From fcd603db457c0fb035df882abc55397bc854a1cd Mon Sep 17 00:00:00 2001
From: Arthur Hanson Rasmusson <arthur@vgpu.io>
Date: Tue, 22 Sep 2026 21:55:54 -0400
Subject: BAR2 verify test fix: remove PRAMIN sync + contiguous ALLOC + vidmem
 VA allocator

Fixes the BAR2 verify test (kbusVerifyBar2_GM107):
1. Removed PRAMIN window sync from emulated BAR1 - the sync was overwriting
   test data written by the driver through the vBar2 aperture. The shadow
   BAR0 is already consistent (guest writes/reads hit the same shadow location).
2. Added contiguous page allocation for golden image (alloc_pages with order
   for large allocations, falling back to individual pages).
3. Added vidmem VA allocator - ALLOC now returns GPU VAs within the emulated
   GPU's vidmem range (0x100000 - fb_size) instead of default 4GB, so the
   memmgr accepts them.

Verified: driver probes past RmInitNvDevice bus init, reaches golden image
channel allocation (progress from fn-10 FREE timeout).
---
 kernel/gsp_emulation.c | 45 +++++++++++++++++----------------------------
 1 file changed, 17 insertions(+), 28 deletions(-)

(limited to 'kernel/gsp_emulation.c')

diff --git a/kernel/gsp_emulation.c b/kernel/gsp_emulation.c
index bdebfb4..44facc1 100644
--- a/kernel/gsp_emulation.c
+++ b/kernel/gsp_emulation.c
@@ -272,15 +272,16 @@ static void gsp_emu_poll_boot(struct gsp_emu_context *ctx)
 	 * (BAR0+0x700000) maps to. On real hardware the PRAMIN window is a
 	 * CPU aperture into vidmem at (BASE << 16) + offset. In our shadow
 	 * the PRAMIN window is just part of the shadow buffer - it does NOT
-	 * alias the emulated BAR1 (vidmem). The BAR2 verify test writes
-	 * through the vBar2 aperture (PRAMIN) and reads back through the
-	 * BAR0 window (also PRAMIN), expecting the same data. Since both
-	 * paths hit the same shadow location, the test data IS consistent.
-	 * However, the test also reads vidmem content through PRAMIN that
-	 * was written via DMA (memmgr) to the emulated BAR1 - those never
-	 * reach the shadow. We sync the PRAMIN window from the emulated
-	 * BAR1 whenever the base register changes, so PRAMIN reads return
-	 * the correct vidmem content.
+	 * alias the emulated BAR1 (vidmem).
+	 *
+	 * The BAR2 verify test writes through the vBar2 aperture (PRAMIN)
+	 * and reads back through the BAR0 window (also PRAMIN), expecting
+	 * the same data. Both paths hit the same shadow location, so the
+	 * test data IS consistent. We do NOT sync the PRAMIN window from
+	 * the emulated BAR1 - the sync would overwrite the test data
+	 * written by the driver through the vBar2 aperture.
+	 *
+	 * The BAR0_WINDOW_BASE register is captured for observability only.
 	 */
 	{
 		u32 bar0_win = gsp_emu_shadow_read32(ctx, 0x1700);
@@ -290,28 +291,16 @@ static void gsp_emu_poll_boot(struct gsp_emu_context *ctx)
 		if (!ctx->bar0_window_valid ||
 		    base != ctx->bar0_window_base ||
 		    target != ctx->bar0_window_target) {
+			static u32 last_pramin_val;
+			u32 pramin_val = gsp_emu_shadow_read32(ctx, 0x70e000);
+
 			ctx->bar0_window_base = base;
 			ctx->bar0_window_target = target;
 			ctx->bar0_window_valid = true;
-
-			/* Sync PRAMIN window (1MB at BAR0+0x700000) from the
-			 * emulated BAR1 at (base << 16). This makes PRAMIN
-			 * reads return the correct vidmem content for the
-			 * BAR2 verify test. */
-			if (ctx->vgpu->bars[1].vaddr && target == 0) {
-				u64 src_off = (u64)base << 16;
-				u32 copy_size = min_t(u64, 0x100000,
-					ctx->vgpu->bars[1].size - src_off);
-
-				if (src_off < ctx->vgpu->bars[1].size) {
-					memcpy(ctx->bar0_vaddr + 0x700000,
-					       (u8 *)ctx->vgpu->bars[1].vaddr + src_off,
-					       copy_size);
-					nv_vgpu_info(ctx->vgpu,
-						"GSP-BOOT: PRAMIN sync base=0x%x target=%u -> BAR1+0x%llx (%u bytes)",
-						base, target, src_off, copy_size);
-				}
-			}
+			nv_vgpu_info(ctx->vgpu,
+				"GSP-BOOT: BAR0_WINDOW base=0x%x target=%u, PRAMIN[0xe000]=0x%08x (was 0x%08x)",
+				base, target, pramin_val, last_pramin_val);
+			last_pramin_val = pramin_val;
 		}
 	}
 
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