From 359345cdda1d047fb1e2ba5259502ec47a7aac37 Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Wed, 7 Oct 2026 13:22:11 -0400 Subject: vgsp: m93 - dump the launch-time instance SC/PDB words (w126..131, w166..173) The m90/m91 decode pinned the SM I-fetch failure to WARP_ESR MMU_NACK at the window-0 shadow VA, while everything FE-side resolves the same small-PT line. The SC array (RAMIN words 166+: VALID mask, then per-VEID SC_PAGE_DIR_BASE LO/HI/flags) is the page directory the SMs' walk is expected to use; log it raw at launch time so the next cycle shows which base/target/flags the server actually programmed (and whether it is the module VASPDB root). --- kernel/gsp_phys_booter.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c index 9778385..1057e16 100644 --- a/kernel/gsp_phys_booter.c +++ b/kernel/gsp_phys_booter.c @@ -16727,6 +16727,24 @@ gr_page_unmapped: goto out; } + { + struct gsp_phys_boot_chunk *inst_c = + &boot_stage.rmcall_chunks[GSP_PHYS_RMCALL_BUF_INSTANCE]; + + if (inst_c->pages) { + const __le32 *iv = + (const __le32 *)gsp_phys_chunk_page_va(inst_c, 0); + + pr_info("vgsp-gr: INST w126..131=%08x %08x %08x %08x %08x %08x w166..173=%08x %08x %08x %08x %08x %08x %08x %08x\n", + le32_to_cpu(iv[126]), le32_to_cpu(iv[127]), + le32_to_cpu(iv[128]), le32_to_cpu(iv[129]), + le32_to_cpu(iv[130]), le32_to_cpu(iv[131]), + le32_to_cpu(iv[166]), le32_to_cpu(iv[167]), + le32_to_cpu(iv[168]), le32_to_cpu(iv[169]), + le32_to_cpu(iv[170]), le32_to_cpu(iv[171]), + le32_to_cpu(iv[172]), le32_to_cpu(iv[173])); + } + } pr_info("vgsp-gr: GR LAUNCH submitted h=0x%x push=0x%llx len=%u pages=%u shadow=%u qmd_va=0x%llx slot=%u words=%u prelude=%d qmdvirt=%d token=0x%x; polling qmd_rel=%u ch_rel=0x%08x (<=%u ms)%s\n", req->h_object, req->push_va, req->push_len, req->n_pages, n_shadow, req->qmd_va, sub.slot, words, -- cgit v1.2.3