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* Phase 4: Portable Architecture ImplementationArthur Hanson Rasmusson2026-09-13
| | | | | | | | | | | - Firmware Analyzer: Runtime firmware signature computation (CRC32, SHA256) and pattern-based RPC handler address discovery - Dynamic RPC Dispatcher: Version-aware dispatch with native firmware handlers (550/560/570/580) and emulation fallback - Hardware Architecture Layer: Turing, Ampere, Blackwell configs with BAR layouts, doorbell offsets, MSI-X vectors - Driver Version Adaptation Layer: Feature detection per driver version - Declarative YAML configs for hardware (turing/ampere/blackwell) and versions (550/560/570/580) - Kernel unit tests for GSP emulation (gsp_emulation_test.c) - Test infrastructure scripts (test_gsp_emu.sh, test_guest_driver.sh, test_cuda_workloads.sh, test_graphics_workloads.sh, test_windows_guest.sh, test_vgpu_stack.sh) - Updated kernel Makefile with new source files
* Phase 3: RPC Handler CompletionArthur Hanson Rasmusson2026-09-13
| | | | | | | | | | | | | - Enhanced gsp_rpc_client.c with proper emulation implementations: - ALLOC/FREE: VRAM allocation tracking with host page allocation and DMA mapping - MAP/UNMAP: GPU VA mapping management - PIN/UNPIN: DMA address retrieval for pinned pages - SCHEDULE/YIELD: Local workqueue-based scheduling - NOTIFY: Callback registration for async events - Added emulation function declarations to gsp_rpc_client.h - Exported nv_vgpu_simple_mapping struct in memory.h for cross-file use - Updated RPC handlers to use gsp_rpc_emulation_is_enabled() accessor - All 12 RPC types now have functional emulation fallbacks
* Phase 2: PCI Config Space & BAR EnhancementsArthur Hanson Rasmusson2026-09-13
| | | | | | | | | | | | | | | | - Enhanced PCI config space write handlers in main.c: - Added MSI-X Message Control (0x72-0x73) write support - Added MSI-X Table Offset/BIR (0x74-0x77) write support - Added MSI-X PBA Offset/BIR (0x78-0x7B) write support - Enhanced BAR emulation in bar_emulation.c: - Added MSI-X Table emulation (32 entries at BAR0+0x2000) - Added MSI-X PBA emulation (64-bit at BAR0+0x3000) - Added nv_vgpu_msix_set_pending/clear_pending for interrupt injection - Integrated with GSP emulation constants from gsp_emulation.h - Updated bar_emulation.h with MSI-X struct definitions and function declarations - Added GSP emulation constants to gsp_emulation.h (MSIX offsets, polling params)
* Phase 1: Add GSP Emulation Engine (host-side)Arthur Hanson Rasmusson2026-09-13
| | | | | | | | | | | | | - New kernel/gsp_emulation.h: GSP emulation context and API - New kernel/gsp_emulation.c: Per-mdev emulation thread with: - Adaptive polling of doorbell at BAR0+0x110C00 - Shared memory RPC processing (4KB at BAR0+0x1000) - Dispatch for all 12 RPC types via firmware-decompiled handlers - MSI-X completion interrupt injection via eventfd - Statistics tracking (processed/failed RPCs, latency) - Modified kernel/main.c: Integrate gsp_emu_init/cleanup in device lifecycle - Modified kernel/Makefile: Add gsp_emulation.o to build - Modified kernel/gsp_rpc_client.h: Export gsp_rpc_emulation_set/is_enabled
* Initial commit: Open-IOV vGPU-IO complete stackArthur Hanson Rasmusson2026-09-13
- Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files - Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver) - Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c - PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps) - 12 RPC types fully mapped from firmware decompilation - BAR trap, WPR, scheduling, notification, migration emulation - Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack - Architecture documentation - Wiki: 10 technical documents - Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos) - nvidia-open-gpu-kernel-modules as submodule