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* docs: gate post-1.0 host acceleration as do-not-implementArthur Hanson Rasmusson10 days
| | | | | | | | | | Clarify in the post-1.0 record and the public status page that host-native acceleration / host display is a stretch goal we are only considering: do not block on it, pursue it, or design around it. It is never reached automatically, requires an explicit human decision after all baseline goals are complete (and only once there is no known risk), and may be scrapped on architectural grounds. No aspect of the baseline software may be designed toward it. No baseline design or code changes.
* docs: defer experimental host acceleration to post-1.0; record rationaleArthur Hanson Rasmusson10 days
The host-VF design is reverted. Independent adversarial, soundness and VM-support reviews falsified its load-bearing mechanisms: RAM-backed BARs cannot be ioremapped or claimed by the stock driver on x86_64 or aarch64; trap-free windows cannot observe edge-triggered writes or read side effects; multi-client GSP-RM is unproven; the MSI and bridge bring-up plans were incorrect; and the isolation and performance claims were overstated for the mechanism. Replace it with one self-contained post-1.0 document recording the findings, corrected candidate approaches and trade-offs, a minimal-risk future architecture, the compile-time + module-load experimental gating policy, a phased plan with abort gates, and the revisit criteria. No baseline design or code path is changed; all earlier doc edits are reverted.