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registry variant; complete vgsp rename; docs/tooling refresh
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
/sys/kernel/debug/vgsp/, vgsp-<subsystem>: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
tool updates; README/SBOM/install/Makefile sync
Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
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The host-VF design is reverted. Independent adversarial, soundness and
VM-support reviews falsified its load-bearing mechanisms: RAM-backed BARs
cannot be ioremapped or claimed by the stock driver on x86_64 or aarch64;
trap-free windows cannot observe edge-triggered writes or read side
effects; multi-client GSP-RM is unproven; the MSI and bridge bring-up
plans were incorrect; and the isolation and performance claims were
overstated for the mechanism.
Replace it with one self-contained post-1.0 document recording the
findings, corrected candidate approaches and trade-offs, a minimal-risk
future architecture, the compile-time + module-load experimental gating
policy, a phased plan with abort gates, and the revisit criteria. No
baseline design or code path is changed; all earlier doc edits are
reverted.
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