| Commit message (Collapse) | Author | Age |
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Clarify in the post-1.0 record and the public status page that host-native
acceleration / host display is a stretch goal we are only considering:
do not block on it, pursue it, or design around it. It is never reached
automatically, requires an explicit human decision after all baseline goals
are complete (and only once there is no known risk), and may be scrapped on
architectural grounds. No aspect of the baseline software may be designed
toward it. No baseline design or code changes.
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exercised (fail-open); async boot FWSEC failure and a release-path freeze recurrence noted
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API skeleton); PLAN A baseline re-verified 64/64
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physical-backend guest-wiring design
- STATE-CURRENT snapshot 2026-10-01 21:05: the host RM-client ladder now
allocates VAS+PDB+TSG+channel and executes a real 4 KiB VA-mode CE copy
(semaphore released, dst==src) on the physical engine; next is wiring the
live session into the guest-facing mdev/vfio path.
- docs/03-architecture/11-physical-backend-guest-wiring.md: phased design
(P0-P6) for bridging the physical backend into the guest-facing emulation,
with the seam table, lifecycle changes and static-config flow.
- docs/README.md: reading order updated for the new document; execution
status refreshed.
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physical engine; channel now allocates; engine did not execute the block
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GSP-RM; wall moved to the address-space page-directory setup; clean release
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channel allocation blocked; unsafe variant removed after fail-safe reboot
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milestone (log-ring and identity fixes)
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static-config RPC
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PMU-provisioned chip identity is the one hard dependency
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init wall narrowed to static-config collection
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under test
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handshake); error journal collapsed 851->4; cycles 4-7 release clean
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RM init fails 0x59; clean release without reboot; NOCAT capture next
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failure 0x59 under diagnosis
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next cycle prepared
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STATE-CURRENT and the integration page reflect the implemented sequencer, clean-shutdown RPC and static-info probe awaiting the next supervised live cycle.
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sequencer executor next)
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STATE-CURRENT and the architecture docs now describe the observed order (FWSEC -> Booter Load -> RISC-V active -> event 0x1002 run-sequencer -> 0x1001 init-done), the four-handoff-bit clean-release constraint, and the --boot/--keep harness contract.
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secure-verification-only retired; full boot lifecycle next
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reboot for restoration
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device pending rescue
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FWSEC dry-run stage
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dry-run stage before live boot)
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secure-verification stage coded (build-only)
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decode identified
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GSP boot is next
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snapshot refreshed
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power-domain mitigation recorded
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bring-up snapshot refreshed
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hazard gate
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verified); freeze-class watch note
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verified, real boot next
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drafted
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frontier
- the per-push 8 s stall was pump bookkeeping (release-seen keyed on the
unchanged tracker-semaphore VA; rewind replays returning to the CE grace
path) - fixed; real-release init now completes in ~1 min
- the content rescue now parses the real method encoding, so NON_INC-headed
pushes validate and their releases land
- the queued launch's module image reaches the emulated vidmem; execution on
real hardware (docs/03-architecture/08 backend) is the next project
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device count
- 6ec799c delivers UVM tracking releases without host-side pins
- one real-release no-watcher cycle reached cudaGetDeviceCount success
- cycles continue; execution backend remains the gating item
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in-flight edit)
- three real-release cycles without kprobes/watchers; no textual result yet
- frontier unchanged: real-release runtime init and the execution backend
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- fresh module per cycle without kprobes/watchers; early observation: a
compute-channel entry stalls with a failure notifier
- frontier unchanged: real-release runtime init and the execution backend
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the next wall
- runtime init rc=0 (cudaGetDeviceCount/SetDevice/alloc/HtoD/launch accepted)
- fixed the legacy clock-domain probe replies that blocked runtime init
- next: real-release runtime init and physical-GPU execution of queued work
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canonical reply fix
- page-directory entry writes captured and validated; 64/64 baseline stays
- vectorAdd client now fails after registration in libcuda (rc=3), no kernel error
- BAR-info canonical reply-size bug fixed; one cache mismatch remains
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task next
- dmesg diagnostics gated behind default-off sema_dbg; 64/64 with a 520-line log
- staging buffer kept resolvable via streamed pins; PD-entry capture remains
- note the guest-side kernel fault observed in serial
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publication capture
- the device-to-host destination now resolves; baseline green again in live runs
- frontier/active-work notes updated: land the capture fix, then the runtime
vectorAdd client
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targeted-fallback/retry work
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- remove the superseded flat state page; current state lives in
STATE-CURRENT.md and the docs tree
- update the historical-material note in docs/README and the STATE-CURRENT
header/see-also references
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wall
- harness runs nvidia-smi and a static-runtime vectorAdd-style client
- page-table walk succeeds at scale; larger runtime buffers still fail
translation (host copies report missing entries)
- frontier/active-work notes updated
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- milestone: cuCtxCreate through cuCtxDestroy with correct data roundtrip
- GMMU walk decode fixed (real entry encoding); DtoH copy-engine-on-compute
allowed for trusted injected pushes
- ladder/diagrams/rails updated; next rung is real CUDA workloads
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walk is the wall
- smoke test ends ALL OK; data roundtrip pending the GPU-VA walk
- HtoD identified as a GRCE inline-data DMA and decoded; destination
translation is the remaining blocker
- frontier/rail refreshed
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payload-pattern audit
- CE LAUNCH_DMA releases are now applied after the push's collected work
runs: the client reads copied data as soon as it observes the release,
so release-first let cuMemcpyDtoH observe a copy that had not executed.
- Unreadable CE entries stay pending for a grace window (sema_ce_grace_ms,
default 8s) before the release fallback consumes them, so a translation
that lands within a service pass lets the push be decoded and its work
executed instead of being dropped.
- sema_copy_pat matches an 8-byte value against every copy's src/dst first
word and scans decoded pushes for it, naming the submission that carries
a known payload regardless of size/encoding.
- sema-dma-skip logs transfer-shaped launches that collect no op; op log
lines carry the channel handle; LAUNCH_DMA inventory follows OPS_LOG.
- A real release application now records the release VA, so decoded pushes
no longer trigger a spurious fake release.
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- GR-info indices 7/9/0x17/0x22 were zero in the emulation (shader-pipe
sub-count among them); filling real-device values clears the previously
fatal context check
- client now runs inside UVM for minutes instead of failing in seconds
- next wall: push-data operand translation (fix in); frontier notes updated
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