summaryrefslogtreecommitdiffstats
path: root/kernel/include/ioctl.h
diff options
context:
space:
mode:
Diffstat (limited to 'kernel/include/ioctl.h')
-rw-r--r--kernel/include/ioctl.h126
1 files changed, 126 insertions, 0 deletions
diff --git a/kernel/include/ioctl.h b/kernel/include/ioctl.h
new file mode 100644
index 0000000..36d28ac
--- /dev/null
+++ b/kernel/include/ioctl.h
@@ -0,0 +1,126 @@
+#ifndef _NV_VGPU_IOCTL_H_
+#define _NV_VGPU_IOCTL_H_
+
+#include "nvidia-vgpu-vfio.h"
+
+#define NV_VGPU_IOCTL_MAGIC 'N'
+
+#define NV_VGPU_IOCTL_GET_INFO \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x01, struct nv_vgpu_ioctl_get_info)
+
+#define NV_VGPU_IOCTL_MAP_BAR \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x02, struct nv_vgpu_ioctl_map_bar)
+
+#define NV_VGPU_IOCTL_UNMAP_BAR \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x03, struct nv_vgpu_ioctl_unmap_bar)
+
+#define NV_VGPU_IOCTL_ENABLE_IRQ \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x04, struct nv_vgpu_ioctl_irq)
+
+#define NV_VGPU_IOCTL_DISABLE_IRQ \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x05, struct nv_vgpu_ioctl_irq)
+
+#define NV_VGPU_IOCTL_GSP_RPC \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x06, struct nv_vgpu_ioctl_gsp_rpc)
+
+#define NV_VGPU_IOCTL_MIGRATE_SAVE \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x07, struct nv_vgpu_ioctl_migrate)
+
+#define NV_VGPU_IOCTL_MIGRATE_RESTORE \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x08, struct nv_vgpu_ioctl_migrate)
+
+#define NV_VGPU_IOCTL_SET_GSP_FIRMWARE \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x09, struct nv_vgpu_ioctl_firmware)
+
+#define NV_VGPU_IOCTL_REGISTER_VGPU_TYPE \
+ _IOWR(NV_VGPU_IOCTL_MAGIC, 0x0A, struct nv_vgpu_ioctl_register_vgpu_type)
+
+/* vGPU type info structure (shared between main.c and ioctl.c) */
+struct nv_vgpu_type_info {
+ char name[64];
+ char description[128];
+ u64 vdev_id;
+ u64 pdev_id;
+ u32 max_instances;
+};
+
+struct nv_vgpu_ioctl_get_info {
+ u32 vgpu_type;
+ u32 vgpu_id;
+ u32 gpu_instance_id;
+ u32 compute_instance_id;
+ u32 state;
+ u64 fb_base;
+ u64 fb_size;
+ u64 bar0_config_base;
+ u32 num_bars;
+ struct {
+ u32 index;
+ u64 gpa;
+ u64 size;
+ u64 iova;
+ bool mapped;
+ bool trapped;
+ } bars[NV_VGPU_MAX_REGIONS];
+};
+
+struct nv_vgpu_ioctl_map_bar {
+ u32 bar_index;
+ u64 gpa;
+ u64 size;
+ u64 iova;
+ u32 flags;
+};
+
+struct nv_vgpu_ioctl_unmap_bar {
+ u32 bar_index;
+ u64 iova;
+ u64 size;
+};
+
+struct nv_vgpu_ioctl_irq {
+ u32 irq_index;
+ int fd;
+};
+
+struct nv_vgpu_ioctl_gsp_rpc {
+ u32 type;
+ u32 flags;
+ u64 data_ptr;
+ u32 data_size;
+ u32 result;
+};
+
+struct nv_vgpu_ioctl_migrate {
+ u64 data_ptr;
+ u32 data_size;
+ u32 flags;
+ int result;
+};
+
+struct nv_vgpu_ioctl_firmware {
+ u32 chip_id;
+ u64 firmware_ptr;
+ u32 firmware_size;
+ u32 firmware_type;
+};
+
+struct nv_vgpu_ioctl_register_vgpu_type {
+ char name[64];
+ char description[128];
+ u64 vdev_id;
+ u64 pdev_id;
+ u32 max_instances;
+};
+
+int nv_vgpu_ioctl_get_info(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_map_bar(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_unmap_bar(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_enable_irq(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_disable_irq(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_gsp_rpc(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_migrate_save(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_migrate_restore(struct nv_vgpu_device *vgpu, void __user *arg);
+int nv_vgpu_ioctl_register_vgpu_type(void __user *arg);
+
+#endif \ No newline at end of file