diff options
Diffstat (limited to 'kernel/gsp_phys_gpu.c')
| -rw-r--r-- | kernel/gsp_phys_gpu.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c index ceb85ee..2f8a127 100644 --- a/kernel/gsp_phys_gpu.c +++ b/kernel/gsp_phys_gpu.c @@ -796,6 +796,26 @@ unsigned int gsp_phys_rmcall_gr_lmem_tpc_size_value(void) EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_lmem_tpc_size_value); /* + * m74 R1/F2 ordering (gsp_phys_rmcall_gr_r1_first; default 0). 1 = send the + * VA-only booking promote (R1) before F2's mapped-MAIN promote so the + * one-shot context-image initializer (0x52a94f8, pEngCtx+0x135) sees the + * per-VAS vaLists and writes their pointers into the GR context image; + * 0 = legacy order (R1 after F2). The FECS-unload-at-dispatch signature of + * m72/m73 is consistent with the image's aux pointers being zero. + */ +static int gsp_phys_rmcall_gr_r1_first_param; +module_param_named(gsp_phys_rmcall_gr_r1_first, + gsp_phys_rmcall_gr_r1_first_param, int, 0644); +MODULE_PARM_DESC(gsp_phys_rmcall_gr_r1_first, + "Send the R1 VA booking before F2's mapped-MAIN promote (default 0 = legacy order)"); + +int gsp_phys_rmcall_gr_r1_first_value(void) +{ + return gsp_phys_rmcall_gr_r1_first_param; +} +EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_r1_first_value); + +/* * m73 sysmem instance/RAMFC selector (gsp_phys_rmcall_gr_inst_sys; default 0). * The m70 capture-shape FBMEM instance/ramfc makes the FECS context load * never complete (sampler: NEW_CTX=V7 instance with VALID=0, then unloaded; |