diff options
Diffstat (limited to 'kernel/gsp_phys_gpu.c')
| -rw-r--r-- | kernel/gsp_phys_gpu.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c index fc84c1d..cfa3d4e 100644 --- a/kernel/gsp_phys_gpu.c +++ b/kernel/gsp_phys_gpu.c @@ -273,6 +273,49 @@ bool gsp_phys_relay_enabled(void) EXPORT_SYMBOL_GPL(gsp_phys_relay_enabled); /* + * P6c C3 engine-fault relay (default 0). When set together with + * gsp_phys_relay=1, gsp_phys_work_forward=1, gsp_phys_guest_mem=1 and + * gsp_phys_work_defer_release=1, a forwarded guest CE copy that times out + * drains the GSP-RM status queue for the engine's fault record (function + * 0x1006 OS_ERROR_LOG, corroborated by 0x1020 NOCAT when present), matches + * its runlistId/chid against the ladder channel derived from the work-submit + * token and, on a match, writes the guest channel's notifier (info32= + * exceptType, info16=Nv2080 engine type, status=0xffff) and posts the channel + * event through the existing MSI-X path. The software release fallback stays + * in charge either way; no fault is delivered for a mismatch, a stale record + * or a release that landed late. With 0, every relay-timeout behavior is + * byte-identical to C0+C1. One-line rollback: gsp_phys_fault_relay=0. + */ +static bool gsp_phys_fault_relay_param; +module_param_named(gsp_phys_fault_relay, gsp_phys_fault_relay_param, bool, 0644); +MODULE_PARM_DESC(gsp_phys_fault_relay, + "Relay a real CE engine fault to the guest channel notifier when a forwarded relay copy times out (default 0: software fallback only; requires gsp_phys_relay=1 and gsp_phys_work_forward=1 and gsp_phys_guest_mem=1 and gsp_phys_work_defer_release=1)"); + +bool gsp_phys_fault_relay_enabled(void) +{ + return gsp_phys_fault_relay_param; +} +EXPORT_SYMBOL_GPL(gsp_phys_fault_relay_enabled); + +/* + * P6c C3 fault-injection debug knob (default 0). When set, the source PTE of + * a relayed pair is written as an invalid zero entry instead of the resolved + * host PA, so the next relay submission faults on the engine and the fault + * drain/decode/relay path can be observed on demand. Only a relayed pair + * (nonzero sem_hpa) is affected; with 0 the PTE write is byte-identical. + */ +static bool gsp_phys_fault_inject_param; +module_param_named(gsp_phys_fault_inject, gsp_phys_fault_inject_param, bool, 0644); +MODULE_PARM_DESC(gsp_phys_fault_inject, + "Write the relayed pair's source PTE as zero to force an engine fault on the next relay submission (debug, default 0: program the real source HPA)"); + +bool gsp_phys_fault_inject_enabled(void) +{ + return gsp_phys_fault_inject_param; +} +EXPORT_SYMBOL_GPL(gsp_phys_fault_inject_enabled); + +/* * One-way power latch (default). Re-enabling runtime PM and D3cold after a * claim lets the board power-gate and the host hard-freeze on resume * (observed 2026-10-01); keep the pre-claim D0 policy instead and require |