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@@ -54,6 +54,16 @@ Our emulation implements stage completion rather than the stages themselves —
which is legitimate because the *only observable* to the driver is the state
machine it polls.
+On the physical path (2026-10-01), the same handshake ran against real
+firmware: FWSEC raised WPR2 with a zero FRTS error code, the SEC2 booter halted
+with mailbox0 = 0, the RISC-V core reported active (`RISCV_STATUS=0x00000035`,
+active bit 0) and `FALCON_OS` read 0. The server's first message was then a
+status-queue event, function `0x1002` (`NV_VGPU_MSG_EVENT_GSP_RUN_CPU_SEQUENCER`,
+`rpc_result=0`), carrying a command buffer the host must execute;
+`GSP_INIT_DONE` (`0x1001`) follows only after that sequencer runs. The
+host-side queue pair behind the exchange is one shared page table plus a 256 KB
+command queue and a 256 KB status queue of 4 KB elements.
+
```mermaid
sequenceDiagram
autonumber