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# Open-IOV Current State
> **Snapshot: 2026-10-05 (reorganized; simulator status current 2026-10-04,
-> physical/guest campaign data as of 2026-10-06 ~10:55; debugging-options
+> physical/guest campaign data as of 2026-10-06 ~18:15; debugging-options
> catalogue added 2026-10-05).** This is a dated public
> status page, not live state; it is refreshed on every progress check. Live
> working notes are maintained outside this repository; the public
@@ -96,9 +96,33 @@ isolation, performance, portability).
front-end (PBDMA), not by the GR engine, so they do not prove engine
execution. A full individual acceptance-sweep cycle was live at snapshot
time. The intermittent guest `cudaMalloc` stall class now has concrete
- (unvalidated) fix candidates: pool-VA resolution ordering before fallback,
- and verification of an unreadable entry before it is consumed. Host
- clean; pstore empty.
+ (unvalidated) fix candidates: pool-VA resolution ordering before fallback,
+ and verification of an unreadable entry before it is consumed. Host
+ clean; pstore empty. **Update 2026-10-06 ~18:15:** the forwarded-launch
+ campaign closed the context and deposit gaps and exhausted the
+ method-form space. (a) The TSG-sibling commit lane (mode 31) gives the
+ execution channel a committed engine context (`ENG_CTX_VALID` set,
+ stage 3/4 green, no wedge) - the KMD skip-ctx channel alone cannot;
+ FBMEM context buffers, a free ChID for the sibling, and dropping the
+ shared-global FECS entry from the sibling's promote were each required
+ and accepted. (b) The inline-QMD copy was proven to execute: when the
+ destination is a module page inside the engine's proven ring-lookup
+ window the front-end deposits the QMD (the guest-VA destination never
+ received one despite an accepted PDE install) - a correction to the
+ earlier "destination stays zero" note. (c) With a committed context and
+ a working deposit the schedule is still absent across every method form
+ (stock window-only window, explicit copy PCAS, the QMD-virtualization
+ enable, and the two-step require-scheduling flow); the program-pointer
+ page offset is now preserved and the runner gained a launch-failure
+ fast-exit plus a flake-only retry wrapper. (d) A wired golden sibling
+ cannot carry a class object (constructs refused before/after its
+ promote), closing the golden-execution lane without a shared
+ subcontext. Ranked next: the context-share (VEID subcontext) route; an
+ init-fidelity sweep (shared-memory window and valid-span overflow area);
+ resolving the privileged register aperture for a real front-end /
+ scheduler readback; and a supervised working-channel capture for a
+ function-level diff. Host clean, GPU green, same boot, no reboots
+ (in-session function-level reset recovery only).
- **Guest frontier: FIRST GREEN END-TO-END GUEST CUDA, NOW UNDER HARDENING
(2026-10-04 ~16:20; hardening 2026-10-05 overnight).** The emulation-only
("no-claim") campaign runs an unmodified guest CUDA program to completion