docs: refresh status, supersede stale material, link the CUDA analysis

* Status now matches the live state: guest driver probe and nvidia-smi work;
  cuInit/device queries work; cuCtxCreate returns 999 because the emulated
  engine list is missing the async copy engine (COPY14). The userspace
  libcuda segfault is recorded as solved, with its mechanism (an RM
  allocation reply must echo request parameters; zeroing them corrupted the
  caller's saved frame pointer).
* Correct the emulation claims: only a subset of RM controls are
  special-cased; the rest return a success reply with zeroed parameters whose
  consumed fields are still being corrected; allocation replies are coherent
  but no server-side object model exists.
* Add the eight-point emulation checklist and reply-fidelity ladder as
  explicit gates, documented in userspace/cuda and linked from the
  architecture, implementation and operations docs.
* Fix operational errors: build/test commands, module load order, mdev type
  names, LFS references, debugfs claims, in-repo firmware claims, CI claims,
  portability matrix (guest status, config layout, userspace driver facts).
* Mark historical material: one superseded banner per legacy document with a
  pointer to its replacement; STATE.md marked as a 2026-09-21 snapshot.
* Wiki: fix the index, add status banners and in-place factual corrections
  (msgq transport vs legacy mailbox, BAR definitions, error statuses,
  migration, glossary), and note the archived 2023 imports.

15 files changed, 131 insertions, 23 deletions

diff --git a/wiki/Address-Reference.md b/wiki/Address-Reference.md
index 08df1a8..8fc7237 100644
--- a/wiki/Address-Reference.md
+++ b/wiki/Address-Reference.md
@@ -1,5 +1,12 @@
 # Address Reference
 
+> **Retained firmware-side address record.** The tables below list addresses
+> inside the GSP 570.144W firmware image (the firmware-side record), not host
+> implementation details. Current architecture:
+> [`../docs/03-architecture/03-gsp-and-gsp-rm.md`](../docs/03-architecture/03-gsp-and-gsp-rm.md)
+> and [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+> Decompiled files live under `firmware/57X-GSP/570.144/decompiled/`.
+
 ## Firmware Base
 | Symbol | Address | Description |
 |--------|---------|-------------|
@@ -183,7 +190,8 @@
 | 0x05CB23D8 | BAR map | BAR mapping |
 
 ## Decompiled Output Files
-All files in: `$OPEN_IOV_ROOT/firmware/570-GSP/decompiled/`
+The decompiled analysis output is not distributed; the file names below record
+what the analysis produced (one decompiled function per firmware address).
 
 | Category | Files |
 |----------|-------|
diff --git a/wiki/BAR-Emulation-Specification.md b/wiki/BAR-Emulation-Specification.md
index b8a46c3..a963dcd 100644
--- a/wiki/BAR-Emulation-Specification.md
+++ b/wiki/BAR-Emulation-Specification.md
@@ -1,7 +1,14 @@
 # BAR Emulation Specification (GSP 570.144W)
 
+> **Historical document — superseded.** The `BAR_TRAP` RPC (type 0x0A)
+> described here is **not used**: in emulation mode it returns `-ENOTSUPP`,
+> and BAR access is synchronous MMIO through the BAR shadow. Guest-visible BAR
+> windows are BAR0 (16 MB register MMIO), BAR1 (256 MB VRAM aperture) and
+> BAR3 (instance window). Canonical documentation:
+> [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+
 ## Overview
-The GSP firmware implements BAR (Base Address Register) emulation for virtual GPU (vGPU) through the **BAR_TRAP** RPC (type 0x0A). The main handler at **0x04CB8188** (40 KB) manages BAR1 aperture, forced access, and memory backing.
+The GSP firmware implements BAR (Base Address Register) emulation for virtual GPU (vGPU) through the **BAR_TRAP** RPC (type 0x0A). The main handler at **0x04CB8188** (40 KB) manages BAR1 aperture, forced access, and memory backing. **This RPC is not used by the live path**: in emulation mode `BAR_TRAP` returns `-ENOTSUPP`; guest BAR access is handled synchronously as MMIO through the BAR shadow (`../kernel/bar_emulation.c`), not via an RPC.
 
 ## Key Addresses
 
diff --git a/wiki/Error-Codes.md b/wiki/Error-Codes.md
index c61da06..8ac65d6 100644
--- a/wiki/Error-Codes.md
+++ b/wiki/Error-Codes.md
@@ -1,5 +1,13 @@
 # GSP Error Codes
 
+> **Historical document — superseded.** The GSP-specific POSIX-style names in
+> this page are historical labels from early reverse engineering, not wire
+> statuses. The emulation uses NVIDIA `NV_STATUS` values: `NV_OK` `0`,
+> `NV_ERR_NOT_SUPPORTED` `0x56`, `NV_ERR_INVALID_PARAMETER` `0x3B`. Canonical
+> reference:
+> [`../docs/09-reference/glossary-and-faq.md`](../docs/09-reference/glossary-and-faq.md)
+> and the kernel's `NV_STATUS` usage (`../kernel/`).
+
 ## Standard POSIX Errors (Negative Return Values)
 
 | Code | Hex | Name | Description |
diff --git a/wiki/GPU_Driver_Internals.md b/wiki/GPU_Driver_Internals.md
index 4c18fca..f22ae5c 100644
--- a/wiki/GPU_Driver_Internals.md
+++ b/wiki/GPU_Driver_Internals.md
@@ -15,6 +15,12 @@
 
 # GPU Driver Internals {#firstHeading .firstHeading}
 
+> **Imported 2023 material — superseded.** This page is an archived copy of the
+> previous project wiki (circa 2023) and is kept for historical reference.
+> Current documentation:
+> [`../docs/03-architecture/`](../docs/03-architecture/) and
+> [`../docs/09-reference/`](../docs/09-reference/).
+
 ::: {#bodyContent .vector-body}
 ::: {#siteSub .noprint}
 From Open-IOV
diff --git a/wiki/GPU_Firmware.md b/wiki/GPU_Firmware.md
index f0f815d..9ce6322 100644
--- a/wiki/GPU_Firmware.md
+++ b/wiki/GPU_Firmware.md
@@ -15,6 +15,12 @@
 
 # GPU Firmware {#firstHeading .firstHeading}
 
+> **Imported 2023 material — superseded.** This page is an archived copy of the
+> previous project wiki (circa 2023) and is kept for historical reference.
+> Current documentation:
+> [`../docs/03-architecture/`](../docs/03-architecture/) and
+> [`../docs/09-reference/`](../docs/09-reference/).
+
 ::: {#bodyContent .vector-body}
 ::: {#siteSub .noprint}
 From Open-IOV
diff --git a/wiki/GPU_SBOM.md b/wiki/GPU_SBOM.md
index b03a4d0..a277802 100644
--- a/wiki/GPU_SBOM.md
+++ b/wiki/GPU_SBOM.md
@@ -15,6 +15,12 @@
 
 # GPU Software Bill Of Materials (SBOM) {#firstHeading .firstHeading}
 
+> **Imported 2023 material — superseded.** This page is an archived copy of the
+> previous project wiki (circa 2023) and is kept for historical reference.
+> Current documentation:
+> [`../docs/03-architecture/`](../docs/03-architecture/) and
+> [`../docs/09-reference/`](../docs/09-reference/).
+
 ::: {#bodyContent .vector-body}
 ::: {#siteSub .noprint}
 From Open-IOV
diff --git a/wiki/GSP-570.144W-Firmware-Analysis.md b/wiki/GSP-570.144W-Firmware-Analysis.md
index d079b0b..8df575c 100644
--- a/wiki/GSP-570.144W-Firmware-Analysis.md
+++ b/wiki/GSP-570.144W-Firmware-Analysis.md
@@ -1,5 +1,14 @@
 # NVIDIA GSP 570.144W Firmware Analysis (TU102/TU104)
 
+> **Retained firmware-analysis record.** This page documents the GSP 570.144W
+> firmware binary (decompilation and firmware-side addresses) and the address
+> tables below are the firmware-side record, not the host implementation.
+> Current host architecture:
+> [`../docs/03-architecture/03-gsp-and-gsp-rm.md`](../docs/03-architecture/03-gsp-and-gsp-rm.md)
+> and [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+> The decompiled analysis output is not distributed; the file names below are
+the analysis record.
+
 ## Binary Information
 - **File**: `gsp-570.144.fwimage.bin`
 - **Size**: 28.5 MB
@@ -225,7 +234,7 @@ Entry: FUN_ram_057a1ac0(param_1, param_2, param_3, param_4, *out_id, *out_a, *ou
 ## Decompiled Output Directory
 
 ```
-$OPEN_IOV_ROOT/firmware/570-GSP/decompiled/
+decompiled/  (analysis output, not distributed)
 ├── entry_ram_04009000.c                    # Boot entry
 ├── FUN_ram_04cb8188_ram_04cb8188.c         # BAR trap handler (40 KB)
 ├── FUN_ram_04cc58f8_ram_04cc58f8.c         # Secondary dispatcher (141 KB)
@@ -299,7 +308,6 @@ $OPEN_IOV_ROOT/firmware/570-GSP/decompiled/
 ---
 
 ## References
-- Handoff: `$OPEN_IOV_ROOT/../Handoff-vGPU-IO.md`
-- RPC Map: `$OPEN_IOV_ROOT/firmware/570-GSP/RPC_HANDLER_MAP.md`
-- Final Report: `$OPEN_IOV_ROOT/firmware/570-GSP/FINAL_REPORT.md`
-- Analysis Results: `$OPEN_IOV_ROOT/firmware/570-GSP/analysis_results.json`
\ No newline at end of file
+- RPC map: [`firmware/57X-GSP/570.144/RPC_HANDLER_MAP.md`](../firmware/57X-GSP/570.144/RPC_HANDLER_MAP.md)
+- Final report: [`firmware/57X-GSP/570.144/FINAL_REPORT.md`](../firmware/57X-GSP/570.144/FINAL_REPORT.md)
+- Analysis results: [`firmware/57X-GSP/570.144/analysis_results.json`](../firmware/57X-GSP/570.144/analysis_results.json)
\ No newline at end of file
diff --git a/wiki/GSP-RPC-Emulation.md b/wiki/GSP-RPC-Emulation.md
index 2e6849a..5a3e788 100644
--- a/wiki/GSP-RPC-Emulation.md
+++ b/wiki/GSP-RPC-Emulation.md
@@ -1,5 +1,11 @@
 # GSP vGPU RPC Emulation
 
+> **Historical document — superseded.** This page describes an earlier
+> emulation-mode design and is retained for reference only. The project does
+> **not** use NVIDIA's proprietary vGPU stack. Canonical documentation:
+> [`../docs/03-architecture/03-gsp-and-gsp-rm.md`](../docs/03-architecture/03-gsp-and-gsp-rm.md)
+> and [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+
 ## Overview
 
 Open-IOV includes **emulation mode** that allows operation with unmodified consumer/OpenRM GSP firmware by emulating missing vGPU RPC handlers locally in kernel and userspace.
diff --git a/wiki/Glossary.md b/wiki/Glossary.md
index 2c61a83..54a3482 100644
--- a/wiki/Glossary.md
+++ b/wiki/Glossary.md
@@ -1,5 +1,8 @@
 # Glossary
 
+> **Historical document — superseded.** The authoritative glossary is
+> [`../docs/09-reference/glossary-and-faq.md`](../docs/09-reference/glossary-and-faq.md).
+
 ## Terms & Abbreviations
 
 ### General
@@ -12,7 +15,7 @@
 | **IOV** | I/O Virtualization - SR-IOV implementation |
 | **RPC** | Remote Procedure Call - GSP-host communication protocol |
 | **BAR** | Base Address Register - PCIe memory-mapped I/O window |
-| **WPR** | Write/Read Protect Region - Memory isolation mechanism |
+| **WPR** | Write-Protected Region - VRAM area reserved for firmware |
 | **SR-IOV** | Single Root I/O Virtualization - PCIe virtualization standard |
 
 ### Firmware Architecture
@@ -51,7 +54,7 @@
 | 0x09 | **NOTIFY** | Event notification |
 | 0x0A | **BAR_TRAP** | BAR access emulation |
 | 0x0B | **MIGRATE** | Live VF migration |
-| 0x0C | **DEBUG** | Debug interface |
+| 0xFF | **DEBUG** | Debug interface |
 
 ### Migration
 | Term | Definition |
@@ -66,12 +69,12 @@
 ### BAR Emulation
 | Term | Definition |
 |------|------------|
-| **BAR1** | Primary 32-bit BAR for register access |
+| **BAR1** | 256 MB VRAM aperture (the register interface is BAR0, 16 MB; BAR3 is the instance/PRAMIN window) |
 | **Bar1Rest** | BAR1 state restoration |
 | **ForceBarAccess** | Hypervisor bypass of VF permissions |
 | **Aperture** | Configurable BAR window size/offset |
 
-### WPR (Write/Read Protect Region)
+### WPR (Write-Protected Region)
 | Term | Definition |
 |------|------------|
 | **Write Protect** | Trap on write access to region |
diff --git a/wiki/Migration-Protocol.md b/wiki/Migration-Protocol.md
index 4fbc879..e78b66f 100644
--- a/wiki/Migration-Protocol.md
+++ b/wiki/Migration-Protocol.md
@@ -1,5 +1,12 @@
 # Migration Protocol (RPC 0x0B)
 
+> **Historical document — superseded.** This page records the MIGRATE RPC
+> (type 0x0B) as seen in firmware analysis; in emulation mode the MIGRATE RPC
+> returns `-ENOTSUPP`. The live migration implementation is
+> [`../kernel/migration.c`](../kernel/migration.c); design and status are
+> documented in
+> [`../docs/04-implementation/`](../docs/04-implementation/).
+
 ## Overview
 The MIGRATE RPC (type 0x0B) implements live migration for vGPU virtual functions. It uses **dual jump tables** for two-phase migration operations, accessed via the primary dispatcher at 0x057A1AC0.
 
diff --git a/wiki/README.md b/wiki/README.md
index a7fee86..bab1cdc 100644
--- a/wiki/README.md
+++ b/wiki/README.md
@@ -1,21 +1,31 @@
 # vGPU-IO Wiki
 
+> **The authoritative entry point is [`../docs/README.md`](../docs/README.md).**
+> The CUDA userspace driver analysis lives at
+> [`../userspace/cuda/READ-ME-FIRST.md`](../userspace/cuda/READ-ME-FIRST.md).
+> `open-iov.org/` is an archived 2023 copy of the previous project wiki, kept
+> for historical reference only.
+
 ## Documentation Index
 
 ### Core Analysis
-- [GSP 570.144W Firmware Analysis](GSP-570.144W-Firmware-Analysis.md) - Complete firmware analysis
-- [RPC Message Format](RPC-Message-Format.md) - Wire protocol specification
-- [BAR Emulation Specification](BAR-Emulation-Specification.md) - BAR1/Bar1Rest/ForceBarAccess
-- [WPR Management](WPR-Management.md) - Write/Read Protect Region handling
-- [Migration Protocol](Migration-Protocol.md) - Live migration RPC 0x0B
-- [GSP RPC Emulation](GSP-RPC-Emulation.md) - Emulation mode for consumer/OpenRM GSP
+- [GSP 570.144W Firmware Analysis](GSP-570.144W-Firmware-Analysis.md) - Firmware decompilation and address record
+- [Address Reference](Address-Reference.md) - Firmware-side address tables
+- [RPC Message Format](RPC-Message-Format.md) - Legacy mailbox wire format (superseded)
+- [BAR Emulation Specification](BAR-Emulation-Specification.md) - BAR_TRAP RPC analysis (superseded)
+- [WPR Management](WPR-Management.md) - WPR handler analysis (superseded)
+- [Migration Protocol](Migration-Protocol.md) - Firmware MIGRATE RPC analysis (superseded)
+- [GSP RPC Emulation](GSP-RPC-Emulation.md) - Earlier emulation-mode design (superseded)
 
 ### Integration Guides
-- [vGPU-IO Integration Guide](vGPU-IO-Integration-Guide.md) - Kernel driver implementation
-- [Kernel RPC Client](Kernel-RPC-Client.md) - Calling convention & message building
-- [Testing & Validation](Testing-and-Validation.md) - Verification procedures
+- [vGPU-IO Integration Guide](vGPU-IO-Integration-Guide.md) - Earlier integration design (superseded)
+- Kernel RPC client and message building - superseded by [docs/03-architecture/03-gsp-and-gsp-rm.md](../docs/03-architecture/03-gsp-and-gsp-rm.md) (the `Kernel-RPC-Client.md` page was never landed)
+- Testing and validation - superseded by [docs/07-developers/onboarding-and-standards.md](../docs/07-developers/onboarding-and-standards.md) (the `Testing-and-Validation.md` page was never landed)
 
 ### Reference
-- [Address Reference](Address-Reference.md) - All key addresses in one table
-- [Error Codes](Error-Codes.md) - GSP error code reference
-- [Glossary](Glossary.md) - Terms and abbreviations
\ No newline at end of file
+- [Error Codes](Error-Codes.md) - Historical error naming (superseded by NV_STATUS values)
+- [Glossary](Glossary.md) - Historical glossary (superseded)
+- [GPU Driver Internals](GPU_Driver_Internals.md) - Imported 2023 material (superseded)
+- [GPU Firmware](GPU_Firmware.md) - Imported 2023 material (superseded)
+- [GPU SBOM](GPU_SBOM.md) - Imported 2023 material (superseded)
+- [Virtual I/O Internals](Virtual_IO_Internals.md) - Imported 2023 material (superseded)
diff --git a/wiki/RPC-Message-Format.md b/wiki/RPC-Message-Format.md
index e627871..baec760 100644
--- a/wiki/RPC-Message-Format.md
+++ b/wiki/RPC-Message-Format.md
@@ -1,5 +1,16 @@
 # GSP RPC Message Format Specification
 
+> **Historical document — superseded.** This page describes the legacy BAR0
+> mailbox RPC model: the 64-byte `GSPR` magic header and the 12-type model
+> below are **not** the path the guest driver uses. The live GSP-RM path is a
+> message queue in guest system memory with 4 KB queue elements and a 32-byte
+> RPC header (signature `0x43505256`, header version `0x03000000`); functions
+> are a flat enum (`SET_GUEST_SYSTEM_INFO` 1, `FREE` 10,
+> `GET_GSP_STATIC_INFO` 65, `GSP_RM_CONTROL` 76, `GSP_RM_ALLOC` 103, ...).
+> Canonical documentation:
+> [`../docs/03-architecture/03-gsp-and-gsp-rm.md`](../docs/03-architecture/03-gsp-and-gsp-rm.md)
+> and [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+
 ## Overview
 The GSP firmware uses a dispatcher-based RPC system with two dispatchers:
 - **Primary** (0x057A1AC0): ALLOC, FREE, MAP, UNMAP, PIN, UNPIN, SCHEDULE, YIELD, NOTIFY, BAR_TRAP, MIGRATE, DEBUG
@@ -191,6 +202,9 @@ typedef struct {
 
 ## Wire Format (Host → GSP)
 
+> **Legacy BAR0 mailbox format — not used by the guest driver.** The current
+> msgq header/element facts are in the note at the top of this page.
+
 ### Message Header (64 bytes)
 ```c
 typedef struct {
diff --git a/wiki/Virtual_IO_Internals.md b/wiki/Virtual_IO_Internals.md
index d97344e..3f3e198 100644
--- a/wiki/Virtual_IO_Internals.md
+++ b/wiki/Virtual_IO_Internals.md
@@ -15,6 +15,12 @@
 
 # Virtual I/O Internals {#firstHeading .firstHeading}
 
+> **Imported 2023 material — superseded.** This page is an archived copy of the
+> previous project wiki (circa 2023) and is kept for historical reference.
+> Current documentation:
+> [`../docs/03-architecture/`](../docs/03-architecture/) and
+> [`../docs/09-reference/`](../docs/09-reference/).
+
 ::: {#bodyContent .vector-body}
 ::: {#siteSub .noprint}
 From Open-IOV
diff --git a/wiki/WPR-Management.md b/wiki/WPR-Management.md
index dbbe5b1..c40667b 100644
--- a/wiki/WPR-Management.md
+++ b/wiki/WPR-Management.md
@@ -1,5 +1,11 @@
 # WPR (Write/Read Protect Region) Management
 
+> **Historical document — superseded.** WPR is the **write-protected region of
+> VRAM reserved for firmware**, not a generic read/write-protect mechanism; the
+> read-protect framing below is historical reverse-engineering material.
+> Canonical documentation:
+> [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md).
+
 ## Overview
 WPR (Write Protect Region / Read Protect Region) provides memory isolation for vGPU by protecting guest memory regions from unauthorized access. The GSP firmware implements WPR through two handlers at **0x04F00B0C** and **0x04F00C78** (62 KB each).
 
diff --git a/wiki/vGPU-IO-Integration-Guide.md b/wiki/vGPU-IO-Integration-Guide.md
index 6e248c9..dfd3759 100644
--- a/wiki/vGPU-IO-Integration-Guide.md
+++ b/wiki/vGPU-IO-Integration-Guide.md
@@ -1,5 +1,12 @@
 # vGPU-IO Integration Guide
 
+> **Historical document — superseded.** This earlier integration design
+> predates the current stack and is retained for reference only. Canonical
+> documentation:
+> getting started [`../docs/02-getting-started/`](../docs/02-getting-started/),
+> host module [`../docs/03-architecture/06-host-module-and-hybrid-model.md`](../docs/03-architecture/06-host-module-and-hybrid-model.md),
+> developer standards [`../docs/07-developers/`](../docs/07-developers/).
+
 ## Overview
 This guide covers implementing a Linux kernel driver for vGPU-IO using the GSP 570.144W firmware RPC interface.