Initial commit: Open-IOV vGPU-IO complete stack

- Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files
- Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver)
- Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c
- PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps)
- 12 RPC types fully mapped from firmware decompilation
- BAR trap, WPR, scheduling, notification, migration emulation
- Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack
- Architecture documentation
- Wiki: 10 technical documents
- Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos)
- nvidia-open-gpu-kernel-modules as submodule

17 files changed, 2864 insertions, 0 deletions

diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbase.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbase.h
new file mode 100644
index 0000000..934c6d0
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbase.h
@@ -0,0 +1,69 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2019-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fbase.finn
+//
+
+#include "ctrl/ctrlxxxx.h"
+/* NV20_SUBDEVICE_DIAG: diagnostic class control commands and parameters */
+
+#define NV208F_CTRL_CMD(cat, idx)          NVXXXX_CTRL_CMD(0x208F, NV208F_CTRL_##cat, idx)
+
+/* Subdevice diag command categories (6 bits) */
+#define NV208F_CTRL_RESERVED              (0x00)
+#define NV208F_CTRL_POWER                 (0x01)
+#define NV208F_CTRL_FIFO                  (0x04)
+#define NV208F_CTRL_FB                    (0x05)
+#define NV208F_CTRL_MC                    (0x06)
+#define NV208F_CTRL_BIF                   (0x07)
+#define NV208F_CTRL_FBIO                  (0x0A)
+#define NV208F_CTRL_MMU                   (0x0B)
+#define NV208F_CTRL_PMU                   (0x0C)
+#define NV208F_CTRL_GPU                   (0x11)
+#define NV208F_CTRL_GR                    (0x12)
+#define NV208F_CTRL_PMGR                  (0x13)
+#define NV208F_CTRL_DMA                   (0x14)
+#define NV208F_CTRL_GSPMSGTIMING          (0x17)
+#define NV208F_CTRL_BUS                   (0x18)
+#define NV208F_CTRL_UCODE_INSTRUMENTATION (0x19)
+#define NV208F_CTRL_NVLINK                (0x1A)
+#define NV208F_CTRL_PROFILING             (0x1B)
+#define NV208F_CTRL_CE                    (0x1C)
+#define NV208F_CTRL_SEC2                  (0x1D)
+
+/*
+ * NV208F_CTRL_CMD_NULL
+ *
+ * This command does nothing.
+ * This command does not take any parameters.
+ *
+ * Possible status values returned are:
+ *     NV_OK
+ */
+#define NV208F_CTRL_CMD_NULL              (0x208f0000) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_RESERVED_INTERFACE_ID << 8) | 0x0" */
+
+/* _ctrl208fbase_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbif.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbif.h
new file mode 100644
index 0000000..6054bf5
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbif.h
@@ -0,0 +1,194 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fbif.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+* NV208F_CTRL_CMD_BIF_PBI_WRITE_COMMAND
+*
+* Control command to send a write command to the Post Box Interface
+*
+* Parameters:
+*
+*cmdFuncId
+*   this specifies the function that needs to be performed on pbi
+*data
+*   the data to be set in the data in register
+* status
+*   this corresponds to pbi status register
+* sysNotify
+*   this corresponds to system notify event, i.e. whether system
+*   needs to be notified of command completion
+* drvNotify
+*   this corresponds to driver notify event, i.e. whether driver
+*   needs to be notified of command completion
+*
+* For the possible values of the above parameters refer rmpbicmdif.h
+*/
+#define NV208F_CTRL_CMD_BIF_PBI_WRITE_COMMAND (0x208f0701) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS {
+    NvU8   cmdFuncId;
+    NvU32  data;
+    NvU8   status;
+    NvBool sysNotify;
+    NvBool drvNotify;
+} NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS;
+
+/*
+* NV208F_CTRL_CMD_BIF_CONFIG_REG_READ
+*   This command is used to read any of the PBI registers in the config space
+*
+* Parameters:
+*
+* RegIndex
+*   Defines the index of the PBI register
+* data
+*   Data that is read
+*/
+#define NV208F_CTRL_CMD_BIF_CONFIG_REG_READ (0x208f0702) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS {
+    NvU8  RegIndex;
+    NvU32 data;
+} NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS;
+
+/*
+* NV208F_CTRL_CMD_BIF_CONFIG_REG_WRITE
+*   This command is used to write any of the PBI registers in the config space
+*
+* Parameters:
+*
+* RegIndex
+*   Defines the index of the PBI register
+* data
+*   Data that is to be written
+*/
+#define NV208F_CTRL_CMD_BIF_CONFIG_REG_WRITE (0x208f0703) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS {
+    NvU8  RegIndex;
+    NvU32 data;
+} NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS;
+
+/*
+* NV208F_CTRL_CMD_BIF_INFO
+*   This command is used to read a bif property
+*
+* Parameters:
+*
+* index
+*   Defines the index of the property to read
+* data
+*   Data that is read
+*/
+#define NV208F_CTRL_CMD_BIF_INFO (0x208f0704) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_INFO_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BIF_INFO_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_BIF_INFO_PARAMS {
+    NvU32 index;
+    NvU32 data;
+} NV208F_CTRL_BIF_INFO_PARAMS;
+
+/* valid bif info index values */
+#define NV208F_CTRL_BIF_INFO_INDEX_L0S_ENABLED   (0x00000000)
+#define NV208F_CTRL_BIF_INFO_INDEX_L1_ENABLED    (0x00000001)
+
+/*
+ * NV208F_CTRL_CMD_BIF_ECC_INJECT_ERROR
+ *
+ * This ctrl call injects PCI-E XPL-EP ECC errors.  Please see the confluence
+ * page "ECC" for more information on ECC and ECC injection:
+ *
+ * Parameters:
+ *
+ * errorUnit
+ *   Specifies the HW unit where the injection will occur.
+ *
+ * errorType
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_BIF_ECC_INJECT_ERROR     (0x208f0705) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+
+
+#define NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x5U)
+
+typedef struct NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS {
+    NvU8 errorType;
+    NvU8 errorUnit;
+} NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_BIF_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for XPL-EP
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ *
+ */
+#define NV208F_CTRL_CMD_BIF_ECC_INJECTION_SUPPORTED (0x208f0706) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x6U)
+
+typedef struct NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   errorUnit;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/* _ctrl208fbif_h_ */
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbus.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbus.h
new file mode 100644
index 0000000..0845699
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fbus.h
@@ -0,0 +1,113 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fbus.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_BUS_IS_BAR1_VIRTUAL
+ *
+ * This command checks whether or not BAR1 is in virtual mode.
+ * This API is intended for internal testing only.
+ *
+ *   bIsVirtual
+ *     Whether or not Bar1 is in virtual mode.
+ */
+#define NV208F_CTRL_CMD_BUS_IS_BAR1_VIRTUAL (0x208f1801) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS {
+    NvBool bIsVirtual;
+} NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_BUS_ECC_INJECT_ERROR
+ *
+ * This ctrl call injects BUS ECC errors.  Please see the confluence
+ * page "ECC" for more information on ECC and ECC injection:
+ *
+ * Parameters:
+ *
+ * location
+ *   Specifies the BUS HW unit where the injection will occur.
+ *
+ * errorType
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_BUS_ECC_INJECT_ERROR     (0x208f1802) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+
+
+#define NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS {
+    NvU8 errorType;
+    NvU8 errorUnit;
+} NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_BUS_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for BUS units
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ *
+ */
+#define NV208F_CTRL_CMD_BUS_ECC_INJECTION_SUPPORTED (0x208f1803) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   errorUnit;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/* _ctrl208fbus_h_ */
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fce.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fce.h
new file mode 100644
index 0000000..99ebdd4
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fce.h
@@ -0,0 +1,178 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fce.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_CE_GET_NUM_SHIM_INSTANCES
+ *
+ * This command returns the number of CE shims on the GPU.
+ *
+ * [out] numShimInstances
+ *    Returns the number of CE shims on the GPU.
+ */
+#define NV208F_CTRL_CMD_CE_GET_NUM_SHIM_INSTANCES (0x208f1c01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_GET_NUM_SHIM_INSTANCES_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_GET_NUM_SHIM_INSTANCES_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_CE_GET_NUM_SHIM_INSTANCES_PARAMS {
+    NvU32 numShimInstances;
+} NV208F_CTRL_CE_GET_NUM_SHIM_INSTANCES_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_CE_GET_MAX_NUM_PCES_PER_SHIM
+ *
+ * This command returns the maximum number of PCEs per CE shim on the GPU.
+ *
+ * [out] numPces
+ *    Returns the maximum number of PCEs on the GPU.
+ */
+#define NV208F_CTRL_CMD_CE_GET_MAX_NUM_PCES_PER_SHIM (0x208f1c02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_GET_MAX_NUM_PCES_PER_SHIM_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_GET_MAX_NUM_PCES_PER_SHIM_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_CE_GET_MAX_NUM_PCES_PER_SHIM_PARAMS {
+    NvU32 numPces;
+} NV208F_CTRL_CE_GET_MAX_NUM_PCES_PER_SHIM_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_CE_GET_AVAILABLE_LCE_MASK
+ *
+ * This command gets the mask of LCEs that are available for the specified CE shim.
+ *
+ * [in] shimInstance
+ *    Specify which CE shim instance to operate on.
+ * [out] lceMask
+ *    Returns a 32-bit mask of which LCEs in the given shim are available.
+ */
+#define NV208F_CTRL_CMD_CE_GET_AVAILABLE_LCE_MASK (0x208f1c03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_GET_AVAILABLE_LCE_MASK_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_GET_AVAILABLE_LCE_MASK_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_CE_GET_AVAILABLE_LCE_MASK_PARAMS {
+    NvU32 shimInstance;
+    NvU32 lceMask;
+} NV208F_CTRL_CE_GET_AVAILABLE_LCE_MASK_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_CE_GET_FLOORSWEPT_PCE_MASK
+ *
+ * This command gets the mask of floorswept PCEs for the specified CE shim.
+ *
+ * [in] shimInstance
+ *    Specify which CE shim instance to operate on.
+ * [out] pceMask
+ *    Returns a 32-bit mask of which PCEs in the given shim are available.
+ */
+#define NV208F_CTRL_CMD_CE_GET_FLOORSWEPT_PCE_MASK (0x208f1c04) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_GET_FLOORSWEPT_PCE_MASK_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_GET_FLOORSWEPT_PCE_MASK_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_CE_GET_FLOORSWEPT_PCE_MASK_PARAMS {
+    NvU32 shimInstance;
+    NvU32 pceMask;
+} NV208F_CTRL_CE_GET_FLOORSWEPT_PCE_MASK_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_CE_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for the CE
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK
+ *      NV_ERR_NOT_SUPPORTED
+ *      NV_ERR_INVALID_ARGUMENT
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS
+ */
+#define NV208F_CTRL_CMD_CE_ECC_INJECTION_SUPPORTED (0x208f1c05) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x5U)
+
+typedef struct NV208F_CTRL_CE_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_CE_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_CE_ECC_ENABLE_ERROR_INJECTION
+ *
+ * This ctrl call enables CE ECC error injection for a given group and PCE.
+ * A copy using the target PCE is required to inject the error.
+ *
+ * Parameters:
+ *
+ * dietletLoc [in]
+ *   Specifies the CE dielet location where the injection will occur. Specify using NV2080_ECC_LOCATION_INFO_DIELET_*.
+ * pceIdx [in]
+ *   Specifies the PCE index where the injection will occur.
+ * errorType [in]
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INSUFFICIENT_PERMISSIONS
+ */
+#define NV208F_CTRL_CMD_CE_ECC_ENABLE_ERROR_INJECTION (0x208f1c06) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | NV208F_CTRL_CE_ECC_ENABLE_ERROR_INJECTION_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CE_ECC_ENABLE_ERROR_INJECTION_PARAMS_MESSAGE_ID (0x6U)
+
+typedef struct NV208F_CTRL_CE_ECC_ENABLE_ERROR_INJECTION_PARAMS {
+    NvU32 dietletLoc;
+    NvU32 pceIdx;
+    NvU8  errorType;
+} NV208F_CTRL_CE_ECC_ENABLE_ERROR_INJECTION_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_CE_ECC_DISABLE_ERROR_INJECTION
+ *
+ * This ctrl call disables CE ECC error injection for all groups and PCEs.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INSUFFICIENT_PERMISSIONS
+ */
+#define NV208F_CTRL_CMD_CE_ECC_DISABLE_ERROR_INJECTION     (0x208f1c07) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_CE_INTERFACE_ID << 8) | 0x7" */
+
+/* _ctrl208fce_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fdma.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fdma.h
new file mode 100644
index 0000000..be4d8e4
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fdma.h
@@ -0,0 +1,92 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2013-2014 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fdma.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_DMA_IS_SUPPORTED_SPARSE_VIRTUAL
+ *
+ * This command checks whether or not "sparse" virtual address ranges are
+ * supported for a given chip. This API is intended for debug-use only.
+ *
+ *   bIsSupported
+ *     Whether or not "sparse" virtual address ranges are supported.
+ */
+#define NV208F_CTRL_CMD_DMA_IS_SUPPORTED_SPARSE_VIRTUAL (0x208f1401) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_DMA_INTERFACE_ID << 8) | NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS {
+    NvBool bIsSupported;
+} NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_DMA_GET_VAS_BLOCK_DETAILS
+ *
+ * This command retrieves various details of the virtual address space block
+ * allocated from the virtual address space heap for the given virtual address.
+ *
+ *   virtualAddress
+ *     Virtual address to get information about.
+ *
+ *   beginAddress
+ *     Start address of the corresponding virtual address space block.
+ *
+ *   endAddress
+ *     End address (inclusive) of the corresponding virtual address space
+ *     block.
+ *
+ *   alignedAddress
+ *     Aligned address of the corresponding virtual address space block.
+ *
+ *   pageSize
+ *     Page size of the virtual address space block.
+ *
+ *   hVASpace
+ *     Handle to an allocated VA space. If 0, it is assumed that the device's
+ *     VA space should be used.
+ */
+#define NV208F_CTRL_CMD_DMA_GET_VAS_BLOCK_DETAILS (0x208f1402) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_DMA_INTERFACE_ID << 8) | NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 virtualAddress, 8);
+    NV_DECLARE_ALIGNED(NvU64 beginAddress, 8);
+    NV_DECLARE_ALIGNED(NvU64 endAddress, 8);
+    NV_DECLARE_ALIGNED(NvU64 alignedAddress, 8);
+    NvU32    pageSize;
+    NvHandle hVASpace;
+} NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS;
+
+/* _ctrl208fdma_h_ */
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffb.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffb.h
new file mode 100644
index 0000000..2add87a
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffb.h
@@ -0,0 +1,842 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2009-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208ffb.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_FB_GET_INFO
+ *
+ * This command returns fb engine information for the associated GPU.
+ * The client specifies what information to query through 'index' param.
+ * On success, the information is stored in the 'data' param.
+ *
+ *   index
+ *     Specify what information to query. Please see below for valid values of
+ *     indexes for this command.
+ *   data
+ *     On success, this param will hold the data that the client queried for.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_PARAM_STRUCT
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FB_GET_INFO (0x208f0501) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_INFO_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_GET_INFO_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_FB_GET_INFO_PARAMS {
+    NvU32 index;
+    NV_DECLARE_ALIGNED(NvU64 data, 8);
+} NV208F_CTRL_FB_GET_INFO_PARAMS;
+
+/* valid fb info index values */
+#define NV208F_CTRL_FB_INFO_INDEX_FREE_CONTIG_COMPRESSION_SIZE (0x00000001)
+
+#define NV208F_CTRL_FB_INFO_INDEX_MAX                          NV208F_CTRL_FB_INFO_INDEX_FREE_CONTIG_COMPRESSION_SIZE
+
+/*
+ * NV208F_CTRL_CMD_FB_GET_ZBC_REFCOUNT
+ *
+ * This command gets the ZBC reference count associated with a given
+ * compression tag address.  It is not supported on GPUs which support class
+ * GF100_ZBC_CLEAR as it is specific to a different hardware implementation.
+ * 
+ *   compTagAddress
+ *     The input parameter indicating the compression tag address for which the
+ *     associated ZBC refcount should be looked up.
+ *   zbcRefCount
+ *     An array of reference counts for the ZBC clear values associated with
+ *     compTagAddress.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FB_GET_ZBC_REFCOUNT                    (0x208f0505) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | 0x5" */ // Deprecated, removed form RM
+
+#define NV208F_CTRL_FB_GET_ZBC_REFCOUNT_MAX_REFCOUNTS          2
+typedef struct NV208F_CTRL_FB_GET_ZBC_REFCOUNT_PARAMS {
+    NvU32 compTagAddress;
+    NvU32 zbcRefCount[NV208F_CTRL_FB_GET_ZBC_REFCOUNT_MAX_REFCOUNTS];
+} NV208F_CTRL_FB_GET_ZBC_REFCOUNT_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_CTRL_GPU_CACHE
+ *
+ * This command controls the state of a cache which all GPU memory accesses go
+ * through.  If supported, it allows changing of the power state and the write
+ * mode.  This is only supported when NV_VERIF_FEATURES is defined.  An error
+ * will be returned if the requested combination of settings is not possible.
+ *
+ *   writeMode
+ *     Specifies the write mode of the cache.  Possible values are defined in
+ *     NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE. Passing _DEFAULT means to
+ *     maintain the current write mode.  It is illegal to change the write mode
+ *     while the cache is disabled or in the same call as a request to disable
+ *     it.
+ *   powerState
+ *     Specifies the power state of the cache.  Possible values are defined in
+ *     NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE.  Passing _DEFAULT means
+ *     to maintain the current power state.
+ *   rcmState
+ *     Specifies the reduced cache mode of the cache.  Possible values are
+ *     defined in NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE.  Passing _DEFAULT
+ *     means to maintain the current RCM state.
+ *   vgaCacheMode
+ *     Specifies whether or not to enable VGA out-of-cache mode.  Possible
+ *     values are defined in NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE.  Passing
+ *     _DEFAULT means to maintain the current VGA caching mode.  
+ *   cacheReset
+ *     Triggers a hardware reset of the cache.  Possible values are defined in
+ *     NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET.  Passing _DEFAULT does
+ *     nothing while passing _RESET clears all data in the cache.
+ *   flags
+ *     Contains flags to control the details of how transitions should be
+ *     handled.  Possible values are defined in
+ *     NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS.  Passing _DEFAULT for any of
+ *     the fields means to use the defaults specified by the Resource Manager.
+ *     Note not all options are available for all transitions.  Flags that are
+ *     set but not applicable will be silently ignored.
+ *   bypassMode
+ *     (Fermi only) Specifies the bypass mode of the L2 cache.  Normal GPU
+ *     operation is _DISABLE.  For TEST ONLY, setting _ENABLE enables a debug
+ *     mode where all transactions miss in L2 and no writes are combined,
+ *     essentially disabling the caching feature of the L2 cache.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_STATE
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+
+#define NV208F_CTRL_CMD_FB_CTRL_GPU_CACHE (0x208f0506) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS_MESSAGE_ID (0x6U)
+
+typedef struct NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS {
+    NvU32 writeMode;
+    NvU32 powerState;
+    NvU32 rcmState;
+    NvU32 vgaCacheMode;
+    NvU32 cacheReset;
+    NvU32 flags;
+    NvU32 bypassMode;
+} NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS;
+
+/* valid values for writeMode */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_DEFAULT      (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_WRITETHROUGH (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_WRITEBACK    (0x00000002)
+
+/* valid values for powerState */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_DEFAULT     (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_ENABLED     (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_DISABLED    (0x00000002)
+
+/* valid values for rcmState */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_DEFAULT       (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_FULL          (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_REDUCED       (0x00000002)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_ZERO_CACHE    (0x00000003)
+
+/* valid values for vgaCacheMode */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_DEFAULT        (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_ENABLED        (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_DISABLED       (0x00000002)
+
+/* valid values for cacheReset */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET_DEFAULT     (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET_RESET       (0x00000001)
+
+/* valid fields and values for flags */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE                   1:0
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_DEFAULT      (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_RM           (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_PMU          (0x00000002)
+
+/* valid values for bypassMode */
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_DEFAULT     (0x00000000)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_DISABLED    (0x00000001)
+#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_ENABLED     (0x00000002)
+
+
+
+/*
+ * NV208F_CTRL_CMD_FB_SET_STATE
+ *
+ * This command is used to put fb engine in a state requested by the caller. 
+ * 
+ *   state
+ *     This parameter specifies the desired engine state:
+ *       NV208F_CTRL_FB_SET_STATE_STOPPED
+ *         This value stops/halts the fb engine.
+ *       NV208F_CTRL_FB_SET_STATE_RESTART      
+ *         This value restarts fb from a stopped state. 
+ *   
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_STATE
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FB_SET_STATE                          (0x208f0508) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_SET_STATE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_SET_STATE_PARAMS_MESSAGE_ID (0x8U)
+
+typedef struct NV208F_CTRL_FB_SET_STATE_PARAMS {
+    NvU32 state;
+} NV208F_CTRL_FB_SET_STATE_PARAMS;
+
+/* valid values for state */
+#define NV208F_CTRL_FB_SET_STATE_STOPPED  (0x00000000)
+#define NV208F_CTRL_FB_SET_STATE_RESTART  (0x00000001)
+
+/*
+ * NV208F_CTRL_CMD_GPU_ECC_SCRUB_DIAG
+ * 
+ * This command reads all the settings internal to scrubbing (both asynchronous
+ * and synchronous.
+ *
+ * Currently implemented: FB offset scrubber has completed, FB offset that scrubber
+ * is completing to, whether or not asynchronous scrubbing is enabled.
+ * 
+ *   fbOffsetCompleted
+ *      This is the offset into FB that the scrubber has completed up to at the
+ *      time this function is invoked. Note that the scrubber is top-down. Therefore
+ *      the memory that remains unscrubbed is from 0x0 to fbOffsetCompleted.
+ *
+ *   fbEndOffset
+ *       This is the offset of the base of the last block that ECC asynchronous
+ *       scrubber has been tasked to scrub.
+ *
+ *   bAsyncScru bDisabled
+ *       This is NV_TRUE if asynchronous scrubbing is disabled and NV_FALSE if
+ *       asynchronous scrubbing is enabled.
+ *
+ * Possible status return values are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG (0x208f0509) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS_MESSAGE_ID (0x9U)
+
+typedef struct NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 fbOffsetCompleted, 8);
+    NV_DECLARE_ALIGNED(NvU64 fbEndOffset, 8);
+    NvBool bAsyncScrubDisabled;
+} NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_GPU_ECC_ASYNCH_SCRUB_REGION
+ *
+ * This command launches the ECC scrubber in asynchronous mode. The scrubber, as
+ * in normal operation, will continue to operate until all of FB (excluding
+ * dedicated system memory) has been scrubbed. Like usual operation, scrubbing is
+ * only done on silicon.
+ *
+ * Possible status return values are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION (0x208f050a) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS_MESSAGE_ID (0xAU)
+
+typedef struct NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 startBlock, 8);
+    NV_DECLARE_ALIGNED(NvU64 endBlock, 8);
+} NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_GPU_ECC_ERROR_INFO
+ * This is a structure that is defined here for diag/debug purposes in mods.
+ * It is used to return the error information as part of the callback to 
+ * kernel clients registering for SBE/DBE callbacks.
+ */
+
+typedef struct NV208F_CTRL_CMD_FB_ECC_ERROR_INFO {
+    NvU32 row;
+    NvU32 bank;
+    NvU32 col;
+    NvU32 extBank;
+    NvU32 xbarAddress;
+    NV_DECLARE_ALIGNED(NvU64 physAddress, 8);
+} NV208F_CTRL_CMD_FB_ECC_ERROR_INFO;
+
+
+#define NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS (0x208f050c) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS_MESSAGE_ID (0xCU)
+
+typedef struct NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 pAddr, 8);
+    NvU32 row;
+    NvU32 bank;
+    NvU32 col;
+    NvU32 extBank;
+    NvU32 rank;
+    NvU32 pseudoChannel;
+    NvU32 physicalSublocation;
+    NvU32 physicalPartition;
+    NvU32 logicalSublocation;
+    NvU32 logicalPartition;
+    NvU32 writeKillPtr0;
+    NvU32 injectionAddr;
+    NvU32 injectionAddrExt;
+    NvU32 rbcAddress;
+    NvU32 rbcAddressExt;
+    NvU32 rbcAddressExt2;
+    NvU32 eccCol;
+} NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_ECC_SET_KILL_PTR
+ *
+ * This command sets the kill pointer for the specified DRAM address.  If
+ * the kill pointer is set to NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE
+ * or NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE, accesses to the specified
+ * address will result in ECC errors until all kill pointers are unset
+ * using NV208F_CTRL_FB_ERROR_TYPE_NONE.
+ *
+ * Only one kill pointer can be set at a time.  Setting a kill pointer will
+ * clear all currently set kill pointers and set the new kill pointer.
+ * Calling NV208F_CTRL_FB_ERROR_TYPE_NONE simply clears all currently set
+ * kill pointers.
+ *
+ *   errorType
+ *      The type of kill pointer to set.  NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE
+ *      will set a single kill pointer resulting in a correctable error.
+ *      NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE will set both kill pointers
+ *      resulting in an uncorrectable error.  NV208F_CTRL_FB_ERROR_TYPE_NONE
+ *      will clear all kill pointers, which stops the associated addresses
+ *      from generating ECC errors if NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE
+ *      or NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE was previously set.
+ *      Only one kill pointer can be set at a time and setting a new
+ *      kill pointer will clear the previous kill pointer.
+ *
+ *    address
+ *      The physical DRAM address to be targeted by the kill pointer
+ *
+ *    bProdInjection
+ *      Whether the kill pointer is set through the production injection flow or not
+ */
+#define NV208F_CTRL_CMD_FB_ECC_SET_KILL_PTR (0x208f050e) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS_MESSAGE_ID" */
+
+typedef enum NV208F_CTRL_FB_ERROR_TYPE {
+    NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE = 0,
+    NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE = 1,
+    NV208F_CTRL_FB_ERROR_TYPE_NONE = 2,
+} NV208F_CTRL_FB_ERROR_TYPE;
+
+#define NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS_MESSAGE_ID (0xEU)
+
+typedef struct NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS {
+    NV208F_CTRL_FB_ERROR_TYPE errorType;
+    NV_DECLARE_ALIGNED(NvU64 address, 8);
+    NvBool                    bProdInjection;
+} NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_FB_INJECT_LTC_ECC_ERROR
+ *
+ * This API allows a client to inject ECC errors in the L2.
+ *
+ *   ltc:
+ *      The physical LTC number to inject the error into.
+ *   slice:
+ *      THe physical slice number within the LTC to inject the error into.
+ *   locationMask
+ *      LTC location subtype(s) where error is to be injected. (Valid on Ampere and later)
+ *   errorType
+ *      Type of error to inject
+ *      NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE for SBE.
+ *      NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE for DBE.
+ *
+ */
+#define NV208F_CTRL_CMD_FB_INJECT_LTC_ECC_ERROR     (0x208f050f) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS_MESSAGE_ID (0xFU)
+
+typedef struct NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS {
+    NvU8                      ltc;
+    NvU8                      slice;
+    NvU8                      locationMask;
+    NV208F_CTRL_FB_ERROR_TYPE errorType;
+} NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for a given HW unit
+ *
+ * location [in]:
+ *      The ECC protected unit for which ECC injection support is being checked.
+ *      The location type is defined by NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC.
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INVALID_ARGUMENT if the requested location is invalid.
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ *
+ */
+#define NV208F_CTRL_CMD_FB_ECC_INJECTION_SUPPORTED (0x208f0510) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x10U)
+
+typedef struct NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   location;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS;
+
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC          1:0
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_LTC   (0x00000000)
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_DRAM  (0x00000001)
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_LRC   (0x00000002)
+#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_SYSL2 (0x00000003)
+
+/*
+ * NV208F_CTRL_CMD_FB_ECC_SET_WRITE_KILL
+ *
+ * This command sets the write kill for the specified DRAM address.  If set,
+ * writes to the specified address won't update the ECC checkbits.  When unset,
+ * writes the specified address will update the ECC checkbits.
+ *
+ * Only one write kill register can be set at a time.  Setting a write kill
+ * will clear all currently set write kills and set the new write kill.
+ * Calling this ctrl call with setWriteKill = false simply clears all currently
+ * set write kills.
+ *
+ *   setWriteKill
+ *      When true, the ECC checkbits for the specified address won't update on
+ *      writes. When false, the ECC checkbits for the specified address will
+ *      revert to normal behavior and update on all writes.
+ *
+ *   address
+ *      The physical DRAM address to be targeted by the write kill
+ *
+ *   bProdInjection
+ *      Whether the write kill is set through the production injection flow or not
+ */
+#define NV208F_CTRL_CMD_FB_ECC_SET_WRITE_KILL            (0x208f0511) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS_MESSAGE_ID (0x11U)
+
+typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS {
+    NvBool setWriteKill;
+    NvBool bProdInjection;
+    NV_DECLARE_ALIGNED(NvU64 address, 8);
+} NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS;
+
+typedef struct NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO {
+    NvU32 bank;
+    NvU32 stackId;
+    NvU32 row;
+    NvU32 partition;
+    NvU32 sublocation;
+    NvU32 pseudoChannel;
+} NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO;
+
+#define NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_PHYSICAL 0x0
+#define NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_RBC      0x1
+
+/*
+ * NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO
+ *
+ *   source
+ *     The reason for retirement. Valid values for this parameter are
+ *     from NV2080_CTRL_FB_REMAPPED_ROW_SOURCE_*
+ *   status
+ *     Reason for row remapping failure. Valid values are:
+ *       NV208F_CTRL_FB_REMAP_ROW_STATUS_OK
+ *         No error
+ *       NV208F_CTRL_FB_REMAP_ROW_STATUS_REMAPPING_PENDING
+ *         The remapping is pending
+ *       NV208F_CTRL_FB_REMAP_ROW_STATUS_TABLE_FULL
+ *         Table full
+ *       NV208F_CTRL_FB_REMAP_ROW_STATUS_ALREADY_REMAPPED
+ *         Attempting to remap a reserved row
+ *       NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR
+ *         Some other RM failure
+ *   addressType
+ *     Type of address passed. Valid values are:
+ *       NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_PHYSICAL
+ *         The specified address is physical address.
+ *       NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_RBC
+ *         The specified address is DRAM Row Bank Column address.
+ *   address
+ *     Union of physicalAddress and rbcAddress. Set the appropriate one based on the address type.
+ */
+typedef struct NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO {
+    NvU8  source;
+    NvU32 status;
+    NvU8  addressType;
+    union {
+        NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8);
+        NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO rbcAddress;
+    } address;
+} NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO;
+
+/* valid values for status */
+#define NV208F_CTRL_FB_REMAP_STATUS_OK                (0x00000000)
+#define NV208F_CTRL_FB_REMAP_STATUS_REMAPPING_PENDING (0x00000001)
+#define NV208F_CTRL_FB_REMAP_STATUS_TABLE_FULL        (0x00000002)
+#define NV208F_CTRL_FB_REMAP_STATUS_ALREADY_REMAPPED  (0x00000003)
+#define NV208F_CTRL_FB_REMAP_STATUS_INTERNAL_ERROR    (0x00000004)
+#define NV208F_CTRL_FB_REMAP_STATUS_NO_SPARE          (0x00000005)
+#define NV208F_CTRL_FB_REMAP_STATUS_INVALID_ARGUMENT  (0x00000006)
+
+typedef NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO NV208F_CTRL_FB_REMAPPING_ROW_ADDRESS_INFO;
+
+#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_PHYSICAL    NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_PHYSICAL
+#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_RBC         NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_RBC
+
+/* valid values for status */
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_OK                NV208F_CTRL_FB_REMAP_STATUS_OK
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_REMAPPING_PENDING NV208F_CTRL_FB_REMAP_STATUS_REMAPPING_PENDING
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_TABLE_FULL        NV208F_CTRL_FB_REMAP_STATUS_TABLE_FULL
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_ALREADY_REMAPPED  NV208F_CTRL_FB_REMAP_STATUS_ALREADY_REMAPPED
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR    NV208F_CTRL_FB_REMAP_STATUS_INTERNAL_ERROR
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_NO_SPARE          NV208F_CTRL_FB_REMAP_STATUS_NO_SPARE
+#define NV208F_CTRL_FB_REMAP_ROW_STATUS_INVALID_ARGUMENT  NV208F_CTRL_FB_REMAP_STATUS_INVALID_ARGUMENT
+
+#define NV208F_CTRL_FB_REMAPPED_ROWS_MAX_ROWS             (0x00000200)
+/*
+ * NV208F_CTRL_CMD_FB_REMAP_ROW
+ *
+ * This command will write entries to Inforom. During init the entries will be
+ * read and used to remap a row.
+ *
+ *   addressList
+ *     This input parameter is an array of NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO
+ *     structures containing information used for row remapping. Valid entries
+ *     are adjacent
+ *   validEntries
+ *     This input parameter specifies the number of valid entries in the
+ *     address array
+ *   numEntriesAdded
+ *     This output parameter specifies how many validEntries were successfully
+ *     added to the Inforom
+ *
+ *   Possible status values returned are:
+ *     NV_OK
+ *     NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FB_REMAP_ROW                      (0x208f0512) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_REMAP_ROW_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_REMAP_ROW_PARAMS_MESSAGE_ID (0x12U)
+
+typedef struct NV208F_CTRL_FB_REMAP_ROW_PARAMS {
+    NV_DECLARE_ALIGNED(NV208F_CTRL_FB_REMAPPING_ROW_ADDRESS_INFO addressList[NV208F_CTRL_FB_REMAPPED_ROWS_MAX_ROWS], 8);
+    NvU32 validEntries;
+    NvU32 numEntriesAdded;
+} NV208F_CTRL_FB_REMAP_ROW_PARAMS;
+
+
+#define NV208F_CTRL_CMD_FB_REVERSE_MAP_RBC_ADDR_TO_PA (0x208f0513) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS_MESSAGE_ID (0x13U)
+
+typedef struct NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 address, 8);
+    NvU32 rbcAddress;
+    NvU32 rbcAddressExt;
+    NvU32 rbcAddressExt2;
+    NvU32 partition;
+    NvU32 sublocation;
+} NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS;
+
+/**
+ * NV208F_CTRL_CMD_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF
+ *
+ * This command will convert a physical address when ECC is on to the physical
+ * address when ECC is off or vice versa
+ *
+ * @params[in] NvU64 inputAddress
+ *     Input physical address
+ *
+ * @params[in] NvBool eccOn
+ *     Whether or not input physical address is with ECC on or off
+ *
+ * @params[out] NvU64 outputAddress
+ *     Output physical address
+ */
+#define NV208F_CTRL_CMD_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF (0x208f0514) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS_MESSAGE_ID (0x14U)
+
+typedef struct NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 inputAddress, 8);
+    NvBool eccOn;
+    NV_DECLARE_ALIGNED(NvU64 outputAddress, 8);
+} NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_ROWS
+ *
+ * This command clears remapping entries from the Inforom's row remapping table.
+ *
+ *   sourceMask
+ *     This is a bit mask of NV2080_CTRL_FB_REMAPPED_ROW_SOURCE. Rows
+ *     remapped from the specified sources will be cleared/removed from the
+ *     Inforom RRL object entries list.
+ *
+ *   bForcePurge
+ *     This flag will force purge the RRL object and associated data structures
+ *
+ *   Possbile status values returned are:
+ *     NV_OK
+ *     NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_ROWS (0x208f0515) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS_MESSAGE_ID (0x15U)
+
+typedef struct NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS {
+    NvU32  sourceMask;
+    NvBool bForcePurge;
+} NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_FB_INJECT_LRC_ECC_ERROR
+ *
+ * This API allows a client to inject ECC errors in the LRC.
+ *
+ *   lrcc:
+ *      The physical LRCC number to inject the error into.
+ *   lrc:
+ *      THe physical LRC number within the LRCC to inject the error into.
+ *   locationMask
+ *      LTC location subtype(s) where error is to be injected. (Valid on Ampere and later)
+ *   errorType
+ *      Type of error to inject
+ *      NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE for SBE.
+ *      NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE for DBE.
+ *
+ */
+#define NV208F_CTRL_CMD_FB_INJECT_LRC_ECC_ERROR (0x208f0516) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_INJECT_LRC_ECC_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_INJECT_LRC_ECC_ERROR_PARAMS_MESSAGE_ID (0x16U)
+
+typedef struct NV208F_CTRL_FB_INJECT_LRC_ECC_ERROR_PARAMS {
+    NvU8                      lrcc;
+    NvU8                      lrc;
+    NvU8                      locationMask;
+    NV208F_CTRL_FB_ERROR_TYPE errorType;
+} NV208F_CTRL_FB_INJECT_LRC_ECC_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_INJECT_SYSLTC_ECC_ERROR
+ *
+ * This API allows a client to inject ECC errors in the SYSLTC.
+ *
+ *   group:
+ *      The physical group number to inject the error into.
+ *   instance:
+ *      The physical instance number within the group to inject the error into.
+ *   instance:
+ *      The physical slice number within the instance to inject the error into.
+ *   locationMask
+ *      SYSLTC location subtype(s) where error is to be injected. Same as LTC.
+ *   errorType
+ *      Type of error to inject
+ *      NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE for SBE.
+ *      NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE for DBE.
+ *
+ */
+#define NV208F_CTRL_CMD_FB_INJECT_SYSLTC_ECC_ERROR (0x208f0517) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS_MESSAGE_ID (0x17U)
+
+typedef struct NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS {
+    NvU8                      group;
+    NvU8                      instance;
+    NvU8                      slice;
+    NvU8                      locationMask;
+    NV208F_CTRL_FB_ERROR_TYPE errorType;
+} NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_GET_FBPA_PAC_MASKS
+ *
+ * This API returns the PAC mask for an FBPA. The format is an array where the
+ * index is the physical FBPA value and the value at the index is the channel
+ * mask at the corresponding FBPA. At this time there can only be max 4
+ * channels per FBPA. A floorswept FBPA will have a value of 0x0, vs a
+ * non-floorswept FBPA with no floorswept channels will have a value of 0xf
+ *
+ */
+#define NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_MAX_FBPAS 64
+
+#define NV208F_CTRL_CMD_FB_GET_FBPA_PAC_MASKS       (0x208f0518) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS_MESSAGE_ID (0x18U)
+
+typedef struct NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS {
+    NvU8 fbpas[NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_MAX_FBPAS];
+} NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_CONVERT_SUBLOCATION
+ *
+ * This API converts either the given sublocation from physical to logical or vice-versa
+ *
+ *   conversionType:
+ *      See NV208F_CTRL_FB_SUBLOCATION_CONVERSION_TYPE
+ *   fbpa:
+ *      The physical fbpa the sublocation resides
+ *   input:
+ *      Input sublocation
+ *   output:
+ *      Output sublocation
+ */
+#define NV208F_CTRL_CMD_FB_CONVERT_SUBLOCATION (0x208f0519) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CONVERT_SUBLOCATION_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_CONVERT_SUBLOCATION_PARAMS_MESSAGE_ID (0x19U)
+
+typedef struct NV208F_CTRL_FB_CONVERT_SUBLOCATION_PARAMS {
+    NvU32 conversionType;
+    NvU32 fbpa;
+    NvU32 input;
+    NvU32 output;
+} NV208F_CTRL_FB_CONVERT_SUBLOCATION_PARAMS;
+
+#define NV208F_CTRL_FB_SUBLOCATION_CONVERSION_TYPE_LOGICAL_TO_PHYSICAL (0x00000000U)
+#define NV208F_CTRL_FB_SUBLOCATION_CONVERSION_TYPE_PHYSICAL_TO_LOGICAL (0x00000001U)
+
+#define NV208F_CTRL_FB_REMAPPED_BANKS_MAX_BANKS                        (0x00000200)
+
+typedef NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO NV208F_CTRL_FB_REMAPPING_BANK_ADDRESS_INFO;
+
+#define NV208F_CTRL_FB_REMAP_BANK_ADDRESS_TYPE_PHYSICAL    NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_PHYSICAL
+#define NV208F_CTRL_FB_REMAP_BANK_ADDRESS_TYPE_RBC         NV208F_CTRL_FB_REMAP_ADDRESS_TYPE_RBC
+
+/* valid values for status */
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_OK                NV208F_CTRL_FB_REMAP_STATUS_OK
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_REMAPPING_PENDING NV208F_CTRL_FB_REMAP_STATUS_REMAPPING_PENDING
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_TABLE_FULL        NV208F_CTRL_FB_REMAP_STATUS_TABLE_FULL
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_NO_SPARE          NV208F_CTRL_FB_REMAP_STATUS_NO_SPARE
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_INTERNAL_ERROR    NV208F_CTRL_FB_REMAP_STATUS_INTERNAL_ERROR
+#define NV208F_CTRL_FB_REMAP_BANK_STATUS_INVALID_ARGUMENT  NV208F_CTRL_FB_REMAP_STATUS_INVALID_ARGUMENT
+
+/*
+ * NV208F_CTRL_CMD_FB_REMAP_BANK
+ *
+ * This command will write entries to Inforom. During init the entries will be
+ * read and used to remap banks.
+ *
+ *   addressList
+ *     This input parameter is an array of NV208F_CTRL_FB_REMAPPING_BANK_ADDRESS_INFO
+ *     structures containing information used for row remapping. Valid entries
+ *     are adjacent. The row field is ignored if RBC address info is given.
+ *   validEntries
+ *     This input parameter specifies the number of valid entries in the
+ *     address array
+ *   numEntriesAdded
+ *     This output parameter specifies how many validEntries were successfully
+ *     added to the Inforom
+ *
+ *   Possible status values returned are:
+ *     NV_OK
+ *     NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FB_REMAP_BANK                      (0x208f051a) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_REMAP_BANK_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_REMAP_BANK_PARAMS_MESSAGE_ID (0x1aU)
+
+typedef struct NV208F_CTRL_FB_REMAP_BANK_PARAMS {
+    NV_DECLARE_ALIGNED(NV208F_CTRL_FB_REMAPPING_BANK_ADDRESS_INFO addressList[NV208F_CTRL_FB_REMAPPED_BANKS_MAX_BANKS], 8);
+    NvU32 validEntries;
+    NvU32 numEntriesAdded;
+} NV208F_CTRL_FB_REMAP_BANK_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_BANKS
+ *
+ * This command clears remapping entries from the Inforom's bank remapping table.
+ *
+ *   sourceMask
+ *     This is a bit mask of NV2080_CTRL_FB_REMAPPED_BANK_SOURCE. Rows
+ *     remapped from the specified sources will be cleared/removed from the
+ *     Inforom RRL object entries list.
+ *
+ *   bForcePurge
+ *     This flag will force purge the BRL object and associated data structures
+ *
+ *   Possbile status values returned are:
+ *     NV_OK
+ *     NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_BANKS (0x208f051b) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CLEAR_REMAPPED_BANKS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_CLEAR_REMAPPED_BANKS_PARAMS_MESSAGE_ID (0x1bU)
+
+typedef struct NV208F_CTRL_FB_CLEAR_REMAPPED_BANKS_PARAMS {
+    NvU32  sourceMask;
+    NvBool bForcePurge;
+} NV208F_CTRL_FB_CLEAR_REMAPPED_BANKS_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FB_SET_ROW_REMAP_FAILURE_FLAG
+ *
+ * This command sets the status of row remap failure flag to the passed value.
+ *
+ *  value
+ *    The value to set for row remap failure flag
+ *
+ *  Possible status values returned are:
+ *    NV_OK
+ *    NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_FB_SET_ROW_REMAP_FAILURE_FLAG (0x208f051cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_SET_ROW_REMAP_FAILURE_FLAG_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FB_SET_ROW_REMAP_FAILURE_FLAG_PARAMS_MESSAGE_ID (0x1cU)
+
+typedef struct NV208F_CTRL_FB_SET_ROW_REMAP_FAILURE_FLAG_PARAMS {
+    NvBool value;
+} NV208F_CTRL_FB_SET_ROW_REMAP_FAILURE_FLAG_PARAMS;
+
+/* _ctrl208ffb_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffbio.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffbio.h
new file mode 100644
index 0000000..e9abbf4
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffbio.h
@@ -0,0 +1,249 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2010-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208ffbio.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_FBIO_SETUP_TRAINING_EXP
+ *
+ * This command defines an fbio training experiment for later use.
+ *
+ * This command has the form of a 'cmd' operation descriminant
+ * followed by a union populated with an operand to match the 'cmd'.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_PARAM_STRUCT
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INVALID_COMMAND
+ *
+ */
+#define NV208F_CTRL_CMD_FBIO_SETUP_TRAINING_EXP                     (0x208f0a03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS_MESSAGE_ID" */
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_NULL
+ * 
+ * This command has no effect when used.
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_NULL                    0
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS
+ *
+ * This command defines the number of register modification slots to be used
+ * in the setup phase of the pass/fail training exercise.  Using this cmd
+ * causes any previously defined modification table to be cleared/released.
+ * The maximum size of the table is defined by
+ *     _SETUP_FBIO_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS__MAX
+ * Using the value of zero for number of mod slots is valid.  "Mod slots"
+ * are defined below.
+ *
+ * Possible status values returned are:
+ *   NV_ERR_INVALID_LIMIT
+ *     if modSlots is > __MAX
+ *   NV_ERR_INSUFFICIENT_RESOURCES
+ *     if we're out of memory setting up the mod slot table
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS 1
+typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS {
+    NvU32 modSlots;
+} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS;
+
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS__MAX 256
+
+/*
+ * NV208F_CTRL_FBIO_SETUPFBIO_TRAINING_EXP_SET_MOD_SLOT
+ *
+ * This command is used to define each individual element of the the sequence
+ * of operations which will be performed before running the pass/fail training
+ * exercise.  Note that this cmd is multi-cmd (with a null cmd all its own,
+ * etc).
+ *
+ * Possible status values returned are:
+ *   NV_ERR_INVALID_INDEX
+ *     if seq is out of range for previously set SET_NUMBER_OF_MOD_SLOTS
+ *     operation.
+ *   NV_ERR_INVALID_COMMAND
+ *     if cmd isn't recognized
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT                 2
+
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_NULL            0
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER
+ *
+ * This cmd is used to define a register transaction to be applied in
+ * sequence before running the pass/fail experiment.  This is where
+ * NV_PFB_TRAINING_ADR, NV_PFB_TRAINING_CMD, NV_PFB_TRAINING_DP(i),
+ * NV_PFB_TRAINING_THRESHOLD and NV_PFB_TRAINING_MASK, etc. should be 
+ * configured before calling back with cmd
+ * NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP.
+ *
+ *   reg
+ *     This parameter specifies the BAR0 register offset to affect.
+ *   andMask
+ *   orMask
+ *     These parameter specify the RMW values to be used in the following:
+ *       write32(reg, (read32(reg) & andMask) | orMask)
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER    1
+typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS {
+    NvU32 reg;
+    NvU32 andMask;
+    NvU32 orMask;
+} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS;
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY
+ *
+ * This cmd is used to define a delay to be applied in the setup sequence
+ * before running the pass/fail experiment.
+ *
+ *  usec
+ *    Specifies delay to be used in microseconds.
+ */
+
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY 2
+typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS {
+    NvU32 usec;
+} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS;
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_INIT_LT
+ *
+ * This cmd is used to define a point where normal link training initialization
+ * may be executed in the sequence before running the pass/fail experiment.  
+ * In general, this is not needed since it is done during normal
+ * initialization, but does allow re-initialization during the sequence.
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_INIT_LT  3
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_RUN_LT
+ *
+ * This cmd is used to define a point where normal link training may be
+ * executed in the sequence before running the pass/fail experiment.
+ * In general, this is not needed since it is somewhat redundant.
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_RUN_LT   4
+
+/*
+ * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_STOP_SEQ
+ *
+ * This cmd is used to define a point where the sequence stops without
+ * running the pass/fail experiment.  
+ */
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_STOP_SEQ 5
+
+
+
+typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS {
+    NvU32 cmd;
+    /* C form: NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_OPERANDS op; */
+    union {
+
+        NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS setRegister;
+
+        NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS        delay;
+    } op;
+    NvU32 seq;
+} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS;
+
+
+
+#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS {
+    NvU32 cmd;
+
+    /* C form: NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_OPERANDS op; */
+    union {
+
+        NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS setNumberOfModSlots;
+
+        NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS              setModSlot;
+    } op;
+} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP
+ *
+ * This command runs the previously defined experiment and returns status on
+ * pass/fail.  NV_OK is returned in the case of both pass
+ * and fail.
+ *
+ * The risingPasses and fallingPasses outputs represents the results across
+ * all partitions and bytelanes.  Each array entry corresponds to a partition
+ * and the bits within each member represent the bytelane.  So e.g.:
+ * risingPasses[4] represents the rising pass results for all of partition 4's
+ * byte lanes.
+ *
+ * The partitionsValid bitmask represents the partitions for which the results
+ * in risingPasses and fallingPasses are valid (not floorswept).
+ *
+ * The bytelanesValid bitmask represents the bytelanes for which the results
+ * are valid (available bytelanes).
+ *
+ * The failingDebug[] represent debug data for why (if so) a test fails.
+ * This is basically NV_PFB_TRAINING_DEBUG(i)
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_PARAM_STRUCT
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_TIMEOUT
+ *       if hardware doesn't respond to request in a timely manner.
+ *   NV_ERR_INVALID_DATA
+ *       if there was some sort of very weird data corruption issue.
+ */
+#define NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP          (0x208f0a04) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE 8
+#define NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS {NvU32 risingPasses[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE];
+    NvU32 fallingPasses[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE];
+    NvU32 failingDebug[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE];
+    NvU32 partitionsValid;
+    NvU32 bytelanesValid;
+} NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS;
+
+#define NV208F_CTRL_CMD_FBIO_GET_TRAINING_CAPS (0x208f0a05) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS_MESSAGE_ID (0x5U)
+
+typedef struct NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS {
+    NvU32 supported;
+} NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS;
+
+// _ctrl208ffbio_h_
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffifo.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffifo.h
new file mode 100644
index 0000000..d5b8849
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208ffifo.h
@@ -0,0 +1,134 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208ffifo.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_FIFO_CHECK_ENGINE_CONTEXT
+ *
+ * This command checks whether or not engine context exists for a given
+ * engine for the channel with a given channel ID. This API is intended
+ * for testing virtual context. For debug only.
+ *
+ *   hChannel
+ *     The handle to the channel.
+ *   engine
+ *     The engine ID.
+ *     Valid values are:
+ *        NV2080_ENGINE_TYPE_GRAPHICS
+ *   exists
+ *     The output are TRUE or FALSE.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_DEVICE
+ *   NV_ERR_INVALID_CHANNEL
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_FIFO_CHECK_ENGINE_CONTEXT (0x208f0401) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS {
+    NvHandle hChannel;
+    NvU32    engine;
+    NvBool   exists;
+} NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FIFO_GET_CHANNEL_STATE
+ *
+ * This command returns the fifo channel state for the given channel.
+ * This is for testing channel behavior.  For debug only.
+ *
+ *   hChannel 
+ *    The handle to the channel
+ *   hClient 
+ *    The handle to the client
+ *   enabled
+ *      The channel is able to run.
+ *   scheduled
+ *      The channel has been scheduled to run.
+ *   cpuMap
+ *      There is a cpu mapping available to this channel.
+ *   contention
+ *      The virtual channel is under contention
+ *   runlistSet
+ *      A runlist has been chosen for this channel
+ *   deferRC
+ *      An RC error has occurred, but recovery will occur at channel teardown.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_DEVICE
+ *   NV_ERR_INVALID_CHANNEL
+ */
+#define NV208F_CTRL_CMD_FIFO_GET_CHANNEL_STATE (0x208f0403) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS {
+    NvHandle hChannel;
+    NvHandle hClient;
+    NvBool   bEnabled;
+    NvBool   bScheduled;
+    NvBool   bCpuMap;
+    NvBool   bContention;
+    NvBool   bRunlistSet;
+    NvBool   bDeferRC;
+} NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_FIFO_GET_CONTIG_RUNLIST_POOL
+ *
+ * This command returns the location of the pool runlists are allocated from for
+ * WPR testing.
+ * For debug only.
+ *
+ * physAddr [out]
+ *    Physical address of the pool
+ *
+ * size [out]
+ *    Size in bytes of the pool
+ *
+ */
+#define NV208F_CTRL_CMD_FIFO_GET_CONTIG_RUNLIST_POOL (0x208f0404) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS {
+    NV_DECLARE_ALIGNED(NvU64 physAddr, 8);
+    NV_DECLARE_ALIGNED(NvU64 size, 8);
+} NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS;
+
+/* _ctrl208ffifo_h_ */
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgpu.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgpu.h
new file mode 100644
index 0000000..2edc89b
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgpu.h
@@ -0,0 +1,169 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fgpu.finn
+//
+
+#include "ctrl/ctrl2080/ctrl2080gr.h"        /* 208F is partially derivative of 2080 */
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_GPU_GET_RAM_SVOP_VALUES
+ *
+ * This command can be used to get the RAM SVOP values.
+ *
+ *    sp
+ *     This field outputs RAM_SVOP_SP
+ *    rg
+ *     This field outputs RAM_SVOP_REG
+ *    pdp
+ *     This field outputs RAM_SVOP_PDP
+ *    dp
+ *     This field outputs RAM_SVOP_DP
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_PARAM_STRUCT
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+
+#define NV208F_CTRL_CMD_GPU_GET_RAM_SVOP_VALUES (0x208f1101) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | NV208F_CTRL_GPU_GET_RAM_SVOP_VALUES_PARAMS_MESSAGE_ID" */
+
+typedef struct NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS {
+    NvU32 sp;
+    NvU32 rg;
+    NvU32 pdp;
+    NvU32 dp;
+} NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS;
+
+#define NV208F_CTRL_GPU_GET_RAM_SVOP_VALUES_PARAMS_MESSAGE_ID (0x1U)
+
+typedef NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS NV208F_CTRL_GPU_GET_RAM_SVOP_VALUES_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_GPU_SET_RAM_SVOP_VALUES
+ *
+ * This command can be used to set the RAM SVOP values.
+ *
+ *    sp
+ *     Input for RAM_SVOP_SP
+ *    rg
+ *     Input for RAM_SVOP_REG
+ *    pdp
+ *     Input for RAM_SVOP_PDP
+ *    dp
+ *     Input for RAM_SVOP_DP
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_PARAM_STRUCT
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+
+#define NV208F_CTRL_CMD_GPU_SET_RAM_SVOP_VALUES (0x208f1102) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | NV208F_CTRL_GPU_SET_RAM_SVOP_VALUES_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GPU_SET_RAM_SVOP_VALUES_PARAMS_MESSAGE_ID (0x2U)
+
+typedef NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS NV208F_CTRL_GPU_SET_RAM_SVOP_VALUES_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_GPU_VERIFY_INFOROM
+ *
+ * This command can be used by clients to determine if an InfoROM
+ * with a valid image is present. If the SKU in question does
+ * not feature an InfoROM, the NV_ERR_NOT_SUPPORTED
+ * error is returned. Else the RM attempts to read the ROM object
+ * and any objects listed in the ROM object. The checksum of
+ * each object read is verified. If all checksums are valid, the
+ * RM will report the InfoROM as being valid. If image is valid then
+ * RM will return a checksum for all of the dynamically configurable
+ * data in InfoROM. This checksum is expected to be same for all the
+ * boards with an identical InfoROM version and similarly configured.
+ *
+ * result
+ *    The result of the InfoROM verification attempt. Possible
+ *    values are:
+ *      NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_NONE
+ *         This value indicates that a validation couldn't be done
+ *         due to some software/OS related error.
+ *      NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_IO_ERROR
+ *         This value indicates that a validation couldn't be done
+ *         due to some IO error.
+ *      NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_VALID
+ *         This value indicates that all InfoROM objects have valid
+ *         checksum.
+ *      NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_INVALID
+ *         This value indicates that some InfoROM objects have invalid
+ *         checksum.
+ * checksum
+ *    Checksum for all of the dynamically configurable data
+ *    in InfoROM for e.g. PWR and CFG objects.
+ *
+ * NOTE: For the result values to be valid, return status should be:
+ *   NV_OK
+ *
+ * Possible return status values:
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_NOT_SUPPORTED
+ *
+ */
+#define NV208F_CTRL_CMD_GPU_VERIFY_INFOROM (0x208f1105) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS_MESSAGE_ID (0x5U)
+
+typedef struct NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS {
+    NvU32 result;
+    NvU32 checksum;
+} NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS;
+
+/* valid result values */
+#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_NONE     (0x00000000)
+#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_IO_ERROR (0x00000001)
+#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_VALID    (0x00000002)
+#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_INVALID  (0x00000003)
+
+/*
+ * NV208F_CTRL_CMD_GPU_DISABLE_ECC_INFOROM_REPORTING
+ *
+ * Possible status return values are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ */
+
+
+
+#define NV208F_CTRL_CMD_GPU_DISABLE_ECC_INFOROM_REPORTING    (0x208f1107) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | 0x7" */
+
+
+
+/* _ctrl208fgpu_h_ */
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgr.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgr.h
new file mode 100644
index 0000000..0317168
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fgr.h
@@ -0,0 +1,169 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2010-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fgr.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+#include "ctrl/ctrl2080/ctrl2080gr.h"
+
+/*
+ * NV208F_CTRL_CMD_GR_ECC_INJECT_ERROR
+ *
+ * Control command to inject a gr ecc error
+ *
+ * Parameters:
+ *
+ * location
+ *   location index
+ * sublocation
+ *   sublocation index
+ * unit
+ *   unit to inject error into
+ * errorType
+ *   SBE or DBE
+ * grRouteInfo
+ *   Routing info for SMC
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_GR_ECC_INJECT_ERROR (0x208f1203) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS {
+    NvU32 location;
+    NvU32 sublocation;
+    NvU8  unit;
+    NvU8  errorType;
+    NV_DECLARE_ALIGNED(NV2080_CTRL_GR_ROUTE_INFO grRouteInfo, 8);
+} NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_GR_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for a given HW unit
+ *
+ * unit [in]:
+ *      The ECC protected unit for which ECC injection support is being checked.
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INVALID_ARGUMENT if the requested unit is invalid.
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ *
+ */
+#define NV208F_CTRL_CMD_GR_ECC_INJECTION_SUPPORTED   (0x208f1204) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   unit;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+    NV_DECLARE_ALIGNED(NV2080_CTRL_GR_ROUTE_INFO grRouteInfo, 8);
+} NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_GR_ECC_SET_TRANSIENT_CLEARING_POLICY
+ *
+ * Control command to determine whether or not the actions to clear potential transient
+ * errors in the SM should be taken
+ *
+ * Parameters:
+ *
+ * policy
+ *   NV208F_CTRL_GR_ECC_TRANSIENT_CLEARING_DISABLED
+ *      Don't attempt to clear a transient error in the SM
+ *   NV208F_CTRL_GR_ECC_TRANSIENT_CLEARING_ENABLED
+ *      Attempt to clear a transient error in the SM
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_GR_ECC_TRANSIENT_CLEARING_DISABLED       (0x00000000)
+#define NV208F_CTRL_GR_ECC_TRANSIENT_CLEARING_ENABLED        (0x00000001)
+
+#define NV208F_CTRL_CMD_GR_ECC_SET_TRANSIENT_CLEARING_POLICY (0x208f1205) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_ECC_SET_TRANSIENT_CLEARING_POLICY_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GR_ECC_SET_TRANSIENT_CLEARING_POLICY_PARAMS_MESSAGE_ID (0x5U)
+
+typedef struct NV208F_CTRL_GR_ECC_SET_TRANSIENT_CLEARING_POLICY_PARAMS {
+    NvU32 policy;
+} NV208F_CTRL_GR_ECC_SET_TRANSIENT_CLEARING_POLICY_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_GR_INJECT_CTXSW_UCODE_ERROR
+ *
+ * Control command to inject a CTXSW ucode error
+ *
+ * Parameters:
+ *
+ * errorType
+ *   Warning, Partial GR Reset, Full GR Reset, or GPU Reset
+ *
+ * errorMethod
+ *   Main, Firmware, or Sideband error
+ *
+ * bInjectGpccs
+ *   TRUE  - inject into GPCCS
+ *   FALSE - inject into FECS
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_GR_INJECT_CTXSW_UCODE_ERROR (0x208f1206) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_INJECT_CTXSW_UCODE_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_GR_INJECT_CTXSW_UCODE_ERROR_PARAMS_MESSAGE_ID (0x6U)
+
+typedef struct NV208F_CTRL_GR_INJECT_CTXSW_UCODE_ERROR_PARAMS {
+    NvU32  errorType;
+    NvU32  errorMethod;
+    NvBool bInjectGpccs;
+} NV208F_CTRL_GR_INJECT_CTXSW_UCODE_ERROR_PARAMS;
+
+
+/* _ctrl208fgr_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fmmu.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fmmu.h
new file mode 100644
index 0000000..0f0c137
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fmmu.h
@@ -0,0 +1,169 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2018-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fmmu.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_MMU_ECC_INJECT_ERROR
+ *
+ * This ctrl call injects MMU ECC errors.  Please see the confluence
+ * page "ECC" for more information on ECC and ECC injection:
+ *
+ * Parameters:
+ *
+ * location
+ *   Only used for HSHUBMMU for pre-Blackwell.
+ *
+ * sublocation
+ *   Only used for HSHUBMMU.
+ *
+ * unit
+ *   Specifies the MMU HW unit where the injection will occur.
+ *
+ * errorType
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_MMU_ECC_INJECT_ERROR (0x208f0b01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS {
+    NvU32 location;
+    NvU32 sublocation;
+    NvU8  unit;
+    NvU8  errorType;
+} NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS;
+
+
+
+/*
+ * NV208F_CTRL_CMD_MMU_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for a given HW unit
+ *
+ * unit [in]:
+ *      The ECC protected unit for which ECC injection support is being checked.
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INVALID_ARGUMENT if the requested location is invalid.
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ */
+#define NV208F_CTRL_CMD_MMU_ECC_INJECTION_SUPPORTED                 (0x208f0b02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+
+
+#define NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   unit;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_MMU_GET_NUM_HSHUBMMUS
+ *
+ * Returns the number of ECC Capable HSHUBMMUS.
+ *
+ * numHshubmmus [out]
+ *   Number of Hshubmmus
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ */
+#define NV208F_CTRL_CMD_MMU_GET_NUM_HSHUBMMUS (0x208f0b03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS {
+    NvU32 numHshubmmus;
+} NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS;
+
+/*
+* NV208F_CTRL_CMD_MMU_GET_NUM_HUBMMUS
+*
+* Returns the number of ECC Capable HUBMMUS.
+*
+* numHubmmus [out]
+*   Number of Hubmmus
+*
+* Possible status values returned are:
+*   NV_OK
+*   NV_ERR_NOT_SUPPORTED
+*/
+#define NV208F_CTRL_CMD_MMU_GET_NUM_HUBMMUS (0x208f0b04) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS_MESSAGE_ID (0x4U)
+
+typedef struct NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS {
+    NvU32 numHubmmus;
+} NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS;
+
+ // extension NV_VERIF_FEATURES
+
+/*
+* NV208F_CTRL_CMD_MMU_GET_NUM_L2TLBS
+*
+* Returns the number of ECC Capable L2TLBs.
+*
+* numL2tlbs [out]
+*   Number of L2tlbs
+*
+* Possible status values returned are:
+*   NV_OK
+*   NV_ERR_NOT_SUPPORTED
+*/
+#define NV208F_CTRL_CMD_MMU_GET_NUM_L2TLBS (0x208f0b06) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_GET_NUM_L2TLBS_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_MMU_GET_NUM_L2TLBS_PARAMS_MESSAGE_ID (0x6U)
+
+typedef struct NV208F_CTRL_MMU_GET_NUM_L2TLBS_PARAMS {
+    NvU32 numL2tlbs;
+} NV208F_CTRL_MMU_GET_NUM_L2TLBS_PARAMS;
+/* _ctrl208fmmu_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fnvlink.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fnvlink.h
new file mode 100644
index 0000000..ee593b5
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fnvlink.h
@@ -0,0 +1,97 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fnvlink.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+#include "ctrl/ctrl2080/ctrl2080nvlink_common.h"
+
+/*
+ * NV208F_CTRL_CMD_NVLINK_ECC_INJECT_ERROR
+ *
+ * This ctrl call injects NVLink SAW, RLW, and TLW ECC errors.  Please see the confluence
+ * page "ECC" for more information on ECC and ECC injection:
+ *
+ * Parameters:
+ *
+ * errorUnit
+ *   Specifies the HW unit where the injection will occur.
+ *
+ * errorType
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * linkMask
+ *   Specifies the mask of links to inject into where bit 0 = link 0, etc.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_NVLINK_ECC_INJECT_ERROR (0x208f1a01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_NVLINK_INTERFACE_ID << 8) | NV208F_CTRL_NVLINK_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+
+
+#define NV208F_CTRL_NVLINK_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_NVLINK_ECC_INJECT_ERROR_PARAMS {
+    NvU8 errorUnit;
+    NvU8 errorType;
+    NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_LINK_MASK links, 8);
+} NV208F_CTRL_NVLINK_ECC_INJECT_ERROR_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_NVLINK_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for the NVLink
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ */
+#define NV208F_CTRL_CMD_NVLINK_ECC_INJECTION_SUPPORTED (0x208f1a02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_NVLINK_INTERFACE_ID << 8) | NV208F_CTRL_NVLINK_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_NVLINK_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_NVLINK_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvU8   errorUnit;
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_NVLINK_ECC_INJECTION_SUPPORTED_PARAMS;
+/* _ctrl208fnvlink_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmgr.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmgr.h
new file mode 100644
index 0000000..7b2a5dd
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmgr.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2011-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fpmgr.finn
+//
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmu.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmu.h
new file mode 100644
index 0000000..07cf579
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpmu.h
@@ -0,0 +1,115 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+  * Software is furnished to do so, subject to the following conditions:
+  *
+  * The above copyright notice and this permission notice shall be included in
+  * all copies or substantial portions of the Software.
+  *
+  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+  * DEALINGS IN THE SOFTWARE.
+  */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fpmu.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_CMD_PMU_ECC_INJECT_ERROR
+ *
+ * This ctrl call injects PMU ECC errors.  Please see the confluence
+ * page "ECC" for more information on ECC and ECC injection.
+ *
+ * Parameters:
+ *
+ * location
+ *   Specifies the PMU HW unit where the injection will occur.
+ *
+ * errorType
+ *   Specifies whether the injected error will be correctable or uncorrectable.
+ *   Correctable errors have no effect on running programs while uncorrectable
+ *   errors will cause all channels to be torn down.
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_INVALID_ARGUMENT
+ */
+#define NV208F_CTRL_CMD_PMU_ECC_INJECT_ERROR (0x208f0c01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID << 8) | NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS {
+    NvU8  errorType;
+    NvU32 errorIdx;
+} NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS;
+
+#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE                 0:0
+#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE_CORRECTABLE   (0x00000000)
+#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE_UNCORRECTABLE (0x00000001)
+
+/*
+ * NV208F_CTRL_CMD_PMU_ECC_INJECTION_SUPPORTED
+ *
+ * Reports if error injection is supported for the PMU
+ *
+ * bCorrectableSupported [out]:
+ *      Boolean value that shows if correcatable errors can be injected.
+ *
+ * bUncorrectableSupported [out]:
+ *      Boolean value that shows if uncorrecatable errors can be injected.
+ *
+ * Return values:
+ *      NV_OK on success
+ *      NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled.
+ *      NV_ERR_NOT_SUPPORTED otherwise
+ *
+ *
+ */
+#define NV208F_CTRL_CMD_PMU_ECC_INJECTION_SUPPORTED         (0x208f0c02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID << 8) | NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x2U)
+
+typedef struct NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS {
+    NvBool bCorrectableSupported;
+    NvBool bUncorrectableSupported;
+} NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS;
+
+/*
+ * NV208F_CTRL_PMU_ECC_GET_NUM_ERROR_INDEXES
+ *
+ * Returns the number of error indexes.
+ *
+ * numErrors [out]
+ *   Number of error indexes
+ *
+ * Return values:
+ *   NV_OK
+ */
+#define NV208F_CTRL_CMD_PMU_ECC_GET_NUM_ERROR_INDEXES (0x208f0c03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID << 8) | NV208F_CTRL_PMU_ECC_GET_NUM_ERROR_INDEXES_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_PMU_ECC_GET_NUM_ERROR_INDEXES_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_PMU_ECC_GET_NUM_ERROR_INDEXES_PARAMS {
+    NvU32 numErrors;
+} NV208F_CTRL_PMU_ECC_GET_NUM_ERROR_INDEXES_PARAMS;
+
+/* _ctrl208fpmu_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpower.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpower.h
new file mode 100644
index 0000000..03f1631
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fpower.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2007-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fpower.finn
+//
+
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fsec2.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fsec2.h
new file mode 100644
index 0000000..cece3c6
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fsec2.h
@@ -0,0 +1,54 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+  * Software is furnished to do so, subject to the following conditions:
+  *
+  * The above copyright notice and this permission notice shall be included in
+  * all copies or substantial portions of the Software.
+  *
+  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+  * DEALINGS IN THE SOFTWARE.
+  */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fsec2.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/*
+ * NV208F_CTRL_SEC2_ECC_GET_NUM_ERROR_INDEXES
+ *
+ * Returns the number of error indexes.
+ *
+ * numErrors [out]
+ *   Number of error indexes
+ *
+ * Return values:
+ *   NV_OK
+ */
+#define NV208F_CTRL_CMD_SEC2_ECC_GET_NUM_ERROR_INDEXES (0x208f1d01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_SEC2_INTERFACE_ID << 8) | NV208F_CTRL_SEC2_ECC_GET_NUM_ERROR_INDEXES_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_SEC2_ECC_GET_NUM_ERROR_INDEXES_PARAMS_MESSAGE_ID (0x1U)
+
+typedef struct NV208F_CTRL_SEC2_ECC_GET_NUM_ERROR_INDEXES_PARAMS {
+    NvU32 numErrors;
+} NV208F_CTRL_SEC2_ECC_GET_NUM_ERROR_INDEXES_PARAMS;
+
+/* _ctrl208fsec2_h_ */
diff --git a/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fucodeinstrumentation.h b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fucodeinstrumentation.h
new file mode 100644
index 0000000..f368cc4
--- /dev/null
+++ b/userspace/sdks/nv570/inc/ctrl/ctrl208f/ctrl208fucodeinstrumentation.h
@@ -0,0 +1,156 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      ctrl/ctrl208f/ctrl208fucodeinstrumentation.finn
+//
+
+#include "ctrl/ctrl208f/ctrl208fbase.h"
+
+/* Numerical ID for each ucode */
+#define NV208F_UCODE_INSTRUMENTATION_SEC2          1
+#define NV208F_UCODE_INSTRUMENTATION_PMU           2
+#define NV208F_UCODE_INSTRUMENTATION_GSP_TASK_RM   3
+#define NV208F_UCODE_INSTRUMENTATION_GSP_TASK_VGPU 4
+
+/* Coverage Type */
+#define NV208F_SANITIZER_COVERAGE_TYPE             0
+#define NV208F_BULLSEYE_COVERAGE_TYPE              1
+
+/*
+ * NV208F_CTRL_UCODE_INSTRUMENTATION_STATE_PARAMS
+ *
+ * Parameters struct shared by the control calls
+ * NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_GET_STATE and
+ * NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_SET_STATE.
+ */
+typedef struct NV208F_CTRL_UCODE_INSTRUMENTATION_STATE_PARAMS {
+    NvU32  ucode;
+    NvU32  gfid;
+    NvBool bEnabled;
+    NvBool bClear;
+    NvU32  instrumentationType;
+} NV208F_CTRL_UCODE_INSTRUMENTATION_STATE_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_GET_STATE
+ *
+ * Retrieves the status of the target ucode's instrumentation
+ *
+ *   ucode                 numeric id of the desired ucode to target
+ *   gfid                  specifies which partition to send the command to
+ *                         (applies to ucode=NV208F_UCODE_INSTRUMENTATION_GSP_TASK_VGPU only)
+ *   bEnabled              whether the ucode's SanitizerCoverage run-time data gathering
+ *                         is enabled (NV_TRUE) or not (NV_FALSE)
+ *   instrumentationType   determines if using SanitizerCoverage or BullseyeCoverage
+ *
+ * Possible status values returned are
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INVALID_STATE
+ */
+#define NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_GET_STATE (0x208f1901) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_INSTRUMENTATION_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_INSTRUMENTATION_GET_STATE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_UCODE_INSTRUMENTATION_GET_STATE_PARAMS_MESSAGE_ID (0x1U)
+
+typedef NV208F_CTRL_UCODE_INSTRUMENTATION_STATE_PARAMS NV208F_CTRL_UCODE_INSTRUMENTATION_GET_STATE_PARAMS;
+
+/*
+ * NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_SET_STATE
+ *
+ * Enables/disables and optionally clears instrumentation data of the target ucode
+ *
+ *   ucode                 numeric id of the desired ucode to target
+ *   gfid                  specifies which partition to send the command to
+ *                         (applies to ucode=NV208F_UCODE_INSTRUMENTATION_GSP_TASK_VGPU only)
+ *   bEnabled              whether to enable (NV_TRUE) or disable (NV_FALSE) instrumentation for the given ucode
+ *   bClear                whether to clear instrumentation prior to enabling enabling instrumentation
+ *   instrumentationType   determines if using SanitizerCoverage or BullseyeCoverage
+ *
+ * Possible status values returned are
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INVALID_STATE
+ */
+#define NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_SET_STATE (0x208f1902) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_INSTRUMENTATION_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_INSTRUMENTATION_SET_STATE_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_UCODE_INSTRUMENTATION_SET_STATE_PARAMS_MESSAGE_ID (0x2U)
+
+typedef NV208F_CTRL_UCODE_INSTRUMENTATION_STATE_PARAMS NV208F_CTRL_UCODE_INSTRUMENTATION_SET_STATE_PARAMS;
+
+/*
+ * NV208F_UCODE_INSTRUMENTATION_RPC_MAX_BYTES_*
+ *
+ * Maximum number of bytes that can be retrieved by one RPC call
+ * (potentially differs per-ucode). These are used to size the buffer in the
+ * respective ucode RPC parameters.
+ */
+#define NV208F_UCODE_INSTRUMENTATION_RPC_MAX_BYTES_PMU   128
+#define NV208F_UCODE_INSTRUMENTATION_RPC_MAX_BYTES_GSPRM 65536
+
+/*
+ * NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_GET_DATA
+ *
+ * Retrieves instrumentation data of the target ucode in chunks.
+ * Call repeatedly with increasing offset until bComplete is NV_TRUE.
+ *
+ * Inputs:
+ *   ucode                 [in]  Numeric ID of the desired ucode to retrieve data from
+ *   gfid                  [in]  Specifies which partition to send the command to
+ *                               (applies to ucode=NV208F_UCODE_INSTRUMENTATION_GSP_TASK_VGPU only)
+ *   offset                [in]  Byte offset from start of coverage data stream.
+ *                               Pass 0 on first call, then pass cumulative dataSize
+ *                               from previous calls.
+ *   instrumentationType   [in]  Determines if using SanitizerCoverage or BullseyeCoverage
+ *
+ * Outputs:
+ *   data                  [out] Buffer containing retrieved coverage data
+ *   dataSize              [out] Number of bytes written to data[] in this call
+ *   bComplete             [out] NV_TRUE when all data has been retrieved,
+ *                               NV_FALSE if more chunks remain
+ *
+ * Possible status values returned are
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_INVALID_STATE
+ */
+#define NV208F_CTRL_CMD_UCODE_INSTRUMENTATION_GET_DATA   (0x208f1903) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_UCODE_INSTRUMENTATION_INTERFACE_ID << 8) | NV208F_CTRL_UCODE_INSTRUMENTATION_GET_DATA_PARAMS_MESSAGE_ID" */
+
+#define NV208F_CTRL_UCODE_INSTRUMENTATION_GET_DATA_PARAMS_MESSAGE_ID (0x3U)
+
+typedef struct NV208F_CTRL_UCODE_INSTRUMENTATION_GET_DATA_PARAMS {
+    NvU32  ucode;
+    NvU32  gfid;
+    NvU32  offset;
+    NvU32  instrumentationType;
+    NvU8   data[NV208F_UCODE_INSTRUMENTATION_RPC_MAX_BYTES_GSPRM];
+    NvU32  dataSize;
+    NvBool bComplete;
+} NV208F_CTRL_UCODE_INSTRUMENTATION_GET_DATA_PARAMS;
+
+/* _ctrl208fucodeinstrumentation_h_ */