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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-28 09:23:51 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-28 09:23:51 -0400 |
| commit | ab393b15abac5b6c0790bb4c4fd86bc62c531bf4 (patch) | |
| tree | f268ff9bdf807c32d0f68f54fe9a0178cbe76ea5 /tools | |
| parent | 448d1d9a6f9168006910a79e177d4bed331bacc6 (diff) | |
| download | open-iov-ab393b15abac5b6c0790bb4c4fd86bc62c531bf4.tar.gz open-iov-ab393b15abac5b6c0790bb4c4fd86bc62c531bf4.zip | |
sema: GR ring autopin must not trust an early base or a pre-existing pin
Two failure modes kept every GR channel dark despite the ring layout being
known:
- The CE region size was latched on the first autopin attempt, which can run
before all CE channels are registered; a too-small base then points every
GR candidate at a chunk whose entry 0 is zeros, and it stays wrong for the
life of the boot. Recompute the base from the live CE ranks on every pass.
- An existing pin for a ring VA (e.g. from a convention guess) made the
autopin mark the rank done without validating the ring - a wrong USERD is
then never corrected. Validate the candidate chunk (entry 0 decode + USERD
put/get) first and only fall back to trusting an existing pin when the
chunk does not validate; on success overwrite the pin.
Also log one diagnostic line per GR rank when the chunk does not validate
yet, so a silent autopin failure is visible in dmesg.
Live: fresh boot, no manual ring pins - 20/20 GR channels auto-pinned
(correct USERD 0x142000 + 0x3000*i) and ran entry 0 (get=1 sub=1) once the
push pages were bridged.
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions
