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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-02 10:58:21 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-02 10:58:21 -0400
commitf909a5f822c5c4a4e9526b861d4171f8925f5113 (patch)
treeed362021c83569f49b48079a774f05775e84b0bd /tools/rmtool/include/rmtool.h
parent09f241601423b1ae98e97846ee451768ff8a0a9e (diff)
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debug: green-eye wave 3 - RM harness, local simulator, device map, MCP plugin, value-validation demos, CI pipeline, toolchain docs; add host RM tools rmtool/rmtop
Diffstat (limited to 'tools/rmtool/include/rmtool.h')
-rw-r--r--tools/rmtool/include/rmtool.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/tools/rmtool/include/rmtool.h b/tools/rmtool/include/rmtool.h
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+++ b/tools/rmtool/include/rmtool.h
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+/* rmtool.h - internal shared declarations for rmtool commands and output. */
+#ifndef RMTOOL_H
+#define RMTOOL_H
+
+#include <stdio.h>
+#include <stddef.h>
+#include "rm_api.h"
+
+#define RMTOOL_VERSION "0.1.0"
+
+enum rm_format {
+ RM_FMT_TABLE = 0,
+ RM_FMT_JSON,
+ RM_FMT_CSV,
+};
+
+struct rm_kv {
+ const char *key;
+ const char *value;
+};
+
+struct rm_ctx {
+ int gpu_minor; /* -1 = first/default GPU */
+ const char *dev_path; /* NULL = /dev/nvidiactl */
+ enum rm_format format;
+ struct rm_client rm;
+ int have_rm;
+};
+
+/* output.c */
+enum rm_format rm_format_parse(const char *name);
+const char *rm_human_kib(NvU64 kib, char *buf, size_t len);
+void rm_print_kv(const char *title, const struct rm_kv *kv, int n,
+ enum rm_format format);
+void rm_print_table(const char *title, const char *const *headers,
+ const char *cells, size_t stride, int rows, int cols,
+ enum rm_format format);
+void rm_hexdump(const void *data, size_t len);
+
+/* query.c */
+int rm_ctx_open(struct rm_ctx *ctx);
+int rm_apply_common_opt(struct rm_ctx *ctx, int opt, const char *arg);
+NvU32 rm_query_name(struct rm_ctx *ctx, char *buf, size_t len);
+NvU32 rm_query_mc_arch(struct rm_ctx *ctx, NV2080_CTRL_MC_ARCH_INFO_PARAMS *p);
+NvU32 rm_query_pci(struct rm_ctx *ctx, NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS *p);
+NvU32 rm_query_fb(struct rm_ctx *ctx, const NvU32 *indices, NvU32 *values,
+ NvU32 n);
+NvU32 rm_query_engines(struct rm_ctx *ctx,
+ NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *p);
+NvU32 rm_query_fifo_table(struct rm_ctx *ctx,
+ NV2080_FIFO_DEVICE_ENTRY *entries,
+ NvU32 max_entries, NvU32 *n_entries);
+const char *rm_arch_str(NvU32 architecture);
+const char *rm_engine_type_name(NvU32 engine_type);
+const char *rm_engine_name(const NV2080_FIFO_DEVICE_ENTRY *entries,
+ NvU32 n_entries, NvU32 engine_type);
+
+/* gpu.c */
+int cmd_gpu(int argc, char **argv, struct rm_ctx *ctx);
+
+/* engine.c */
+int cmd_engine(int argc, char **argv, struct rm_ctx *ctx);
+
+/* mem.c */
+int cmd_mem(int argc, char **argv, struct rm_ctx *ctx);
+
+/* nv2080.c (includes sample) */
+int cmd_nv2080(int argc, char **argv, struct rm_ctx *ctx);
+int cmd_sample(int argc, char **argv, struct rm_ctx *ctx);
+
+#endif /* RMTOOL_H */