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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-09-29 14:38:44 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-09-29 14:38:44 -0400
commit9db2c19f4e5d1a52dc500a199ed6dfa78f35ff0a (patch)
tree90422631f7825c935490e93c1298ac54f5b91102 /kernel
parentbe46061c66690752bf03aaaf4d72e4fa2b5f418d (diff)
downloadopen-iov-9db2c19f4e5d1a52dc500a199ed6dfa78f35ff0a.tar.gz
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tools: pin GR push-buffer window from guest pagemap per boot; widen injected-pin table
The GR channel GPFIFO entries point at pushes in the client GPU VA window (observed 0x200400000 + stride, one allocation per channel) and the pump cannot read them: pushes_nomap grows and the tracking-semaphore releases they carry never land. The pushes are sysmem pages mapped into the client process, so /proc/<pid>/pagemap in the guest gives the GPA. New guest helper guest_pmap_win.py batch-reads the pagemap of a VA range (512 entries per pread). New host tool pin_gr_window.py rescans the window on an interval, follows cdt pid changes, and injects VA->PA runs through sema_map_add (same mechanism as the counters and the CE pushbuffer pins). The injected-pin table grows 8k -> 32k slots so the CE pushbuffer (4096) plus the GR window pages fit without drops.
Diffstat (limited to 'kernel')
-rw-r--r--kernel/gsp_sema_service.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/kernel/gsp_sema_service.c b/kernel/gsp_sema_service.c
index b9e7db3..1296f81 100644
--- a/kernel/gsp_sema_service.c
+++ b/kernel/gsp_sema_service.c
@@ -178,9 +178,12 @@ static u32 svc_map_hash[SEMA_MAP_MAX * 2];
#define SVC_PIN_PROBE 128
/*
* Host-injected translations (debug `sema_map_add`): authoritative, never
- * overwritten by self-discovery, checked before every other source.
+ * overwritten by self-discovery, checked before every other source. The GR
+ * push-buffer window pins thousands of client pages per boot (one entry per
+ * 4 KB page), so the table must hold them plus the CE push-buffer region
+ * (4096 pages) without dropping inserts.
*/
-#define SVC_IPIN_SLOTS (1u << 13)
+#define SVC_IPIN_SLOTS (1u << 15)
#define SVC_IPIN_PROBE 64
struct svc_pin {