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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-13 18:36:21 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-13 18:36:21 -0400 |
| commit | 00e54c13c7c9030c4d5f7151467f2d85a3730e29 (patch) | |
| tree | 17a45239df8d2e4912ff3697ed06e85a10b969de /kernel/include/irq.h | |
| download | open-iov-00e54c13c7c9030c4d5f7151467f2d85a3730e29.tar.gz open-iov-00e54c13c7c9030c4d5f7151467f2d85a3730e29.zip | |
Initial commit: Open-IOV vGPU-IO complete stack
- Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files
- Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver)
- Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c
- PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps)
- 12 RPC types fully mapped from firmware decompilation
- BAR trap, WPR, scheduling, notification, migration emulation
- Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack
- Architecture documentation
- Wiki: 10 technical documents
- Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos)
- nvidia-open-gpu-kernel-modules as submodule
Diffstat (limited to 'kernel/include/irq.h')
| -rw-r--r-- | kernel/include/irq.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/kernel/include/irq.h b/kernel/include/irq.h new file mode 100644 index 0000000..d06ac5b --- /dev/null +++ b/kernel/include/irq.h @@ -0,0 +1,45 @@ +#ifndef _NV_VGPU_IRQ_H_ +#define _NV_VGPU_IRQ_H_ + +#include "nvidia-vgpu-vfio.h" + +#define NV_VGPU_MAX_MSI_VECTORS 32 + +struct nv_vgpu_msi_irq { + int virq; + u32 vector; + bool enabled; + struct eventfd_ctx *trigger; + struct irq_domain *domain; + struct msi_msg msg; +}; + +struct nv_vgpu_irq_ctx { + struct nv_vgpu_device *vgpu; + struct mutex lock; + struct nv_vgpu_msi_irq msis[NV_VGPU_MAX_MSI_VECTORS]; + int msi_count; + bool msi_enabled; + bool msix_enabled; +}; + +int nv_vgpu_irq_init(struct nv_vgpu_device *vgpu); +void nv_vgpu_irq_cleanup(struct nv_vgpu_device *vgpu); + +int nv_vgpu_irq_enable(struct nv_vgpu_device *vgpu, int irq_idx); +int nv_vgpu_irq_disable(struct nv_vgpu_device *vgpu, int irq_idx); + +int nv_vgpu_irq_setup_msi(struct nv_vgpu_device *vgpu, int num_vectors); +int nv_vgpu_irq_setup_msix(struct nv_vgpu_device *vgpu, int num_vectors); +void nv_vgpu_irq_teardown_msi(struct nv_vgpu_device *vgpu); +void nv_vgpu_irq_teardown_msix(struct nv_vgpu_device *vgpu); + +int nv_vgpu_irq_set_trigger(struct nv_vgpu_device *vgpu, int irq_idx, int fd); +int nv_vgpu_irq_get_virq(struct nv_vgpu_device *vgpu, int irq_idx); + +static inline struct nv_vgpu_irq_ctx *vgpu_to_irq_ctx(struct nv_vgpu_device *vgpu) +{ + return (struct nv_vgpu_irq_ctx *)vgpu->irq_ctx; +} + +#endif
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