Initial commit: Open-IOV vGPU-IO complete stack

- Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files
- Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver)
- Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c
- PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps)
- 12 RPC types fully mapped from firmware decompilation
- BAR trap, WPR, scheduling, notification, migration emulation
- Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack
- Architecture documentation
- Wiki: 10 technical documents
- Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos)
- nvidia-open-gpu-kernel-modules as submodule

1 files changed, 57 insertions, 0 deletions

diff --git a/kernel/include/bar_emulation.h b/kernel/include/bar_emulation.h
new file mode 100644
index 0000000..759fa25
--- /dev/null
+++ b/kernel/include/bar_emulation.h
@@ -0,0 +1,57 @@
+#ifndef _NV_VGPU_BAR_EMULATION_H_
+#define _NV_VGPU_BAR_EMULATION_H_
+
+#include "nvidia-vgpu-vfio.h"
+
+struct nv_vgpu_bar_emul_ctx {
+	struct nv_vgpu_device *vgpu;
+	void *bar0_shadow;
+	size_t bar0_shadow_size;
+	spinlock_t shadow_lock;
+	
+	struct {
+		u32 offset;
+		u32 value;
+		bool is_write;
+		bool trapped;
+	} trap_regs[256];
+	int trap_count;
+};
+
+int nv_vgpu_bar_emul_init(struct nv_vgpu_device *vgpu);
+void nv_vgpu_bar_emul_cleanup(struct nv_vgpu_device *vgpu);
+
+int nv_vgpu_bar_trap_register(struct nv_vgpu_device *vgpu, int bar_idx,
+			       u32 offset, u32 size);
+int nv_vgpu_bar_untrap_register(struct nv_vgpu_device *vgpu, int bar_idx,
+				 u32 offset);
+
+int nv_vgpu_bar_emul_read(struct nv_vgpu_device *vgpu, int bar_idx,
+			   u64 offset, void *val, size_t size);
+int nv_vgpu_bar_emul_write(struct nv_vgpu_device *vgpu, int bar_idx,
+			    u64 offset, void *val, size_t size);
+
+int nv_vgpu_bar_emul_handle_fault(struct nv_vgpu_device *vgpu,
+				   unsigned long addr, bool write);
+
+static inline u32 nv_vgpu_read_reg(void __iomem *base, u32 offset)
+{
+	return readl(base + offset);
+}
+
+static inline void nv_vgpu_write_reg(void __iomem *base, u32 offset, u32 val)
+{
+	writel(val, base + offset);
+}
+
+static inline u64 nv_vgpu_read_reg64(void __iomem *base, u32 offset)
+{
+	return readq(base + offset);
+}
+
+static inline void nv_vgpu_write_reg64(void __iomem *base, u32 offset, u64 val)
+{
+	writeq(val, base + offset);
+}
+
+#endif
\ No newline at end of file