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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-02 02:07:52 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-02 02:07:52 -0400 |
| commit | c886760efda836b060fee03bfce852f16f04b5b8 (patch) | |
| tree | dd9016dac7ffa33a383505d68d46af4df2b4bbf7 /kernel/gsp_sema_service.h | |
| parent | 3293b014abac3e7bf492c50aba9b28a9adbb458e (diff) | |
| download | open-iov-c886760efda836b060fee03bfce852f16f04b5b8.tar.gz open-iov-c886760efda836b060fee03bfce852f16f04b5b8.zip | |
gsp-phys: freeze-safe release, boot-proof READY, and guest-wiring P2/P3/P5-wave1
Host-freeze fix bundle (validated 2/2 supervised cycles):
- power unlock now latches D0/D3cold by default (new gsp_phys_repower,
default 0); releasing the claim can no longer power-gate the board and
hard-freeze the host on resume
- bounded post-rebind readiness gate before dropping the locks; bounded D0
settle/verify before the unbind
- READY means a live GSP-RM session: the async worker and the module-owned
join only expose READY when init-done is seen and no unload was sent;
otherwise the claim is released fail-open
- FWSEC reads DMEM0/IMEM back before STARTCPU and fails fast when the
staging is not visible
- the claim harness leaves the board latched by default and takes
--restore-power to opt back into the old restore
Guest-wiring:
- P2: generation-keyed fn65 static-config snapshot cache plus a default-off
identity overlay (new gsp_phys_static_live) for name/short-name/VBIOS;
the probe cycle runs once per backend generation at READY
- P3: default-off read-only RM_CONTROL forwarding whitelist (new
gsp_phys_ctrl_forward) with emulated-handle translation to the adopted
server handles and full emulation fallback
- P5 wave 1: default-off shadow execution of guest CE pushes on the ladder
channel (new gsp_phys_work_forward) via a dedicated ordered work item;
the ladder stage-4 submission is refactored into a shared bounded helper
and the software release path stays authoritative
Live: module-owned boot to init-done, guest smoke ALL OK 64/64 with P2/P3
enabled, 514 shadow copies observed on the physical CE; all cycles released
cleanly with WPR2 down and no reboot.
Diffstat (limited to 'kernel/gsp_sema_service.h')
| -rw-r--r-- | kernel/gsp_sema_service.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/kernel/gsp_sema_service.h b/kernel/gsp_sema_service.h index 7778443..ae9b7da 100644 --- a/kernel/gsp_sema_service.h +++ b/kernel/gsp_sema_service.h @@ -66,6 +66,17 @@ int gsp_sema_service_counter_add(u32 h_object, u64 pa); void gsp_sema_service_doorbell(u32 token); /* + * P5 wave-1 shadow work lifetime hooks. The backend release path must call + * gsp_sema_service_work_quiesce() before it frees the ladder buffers: it + * pauses new shadow requests and waits (bounded by the submit's 200 ms poll + * cap) for the in-flight one to finish, so no poll ever touches freed memory. + * gsp_sema_service_work_resume() re-enables requests when a new backend + * session starts. + */ +void gsp_sema_service_work_quiesce(void); +void gsp_sema_service_work_resume(void); + +/* * Discover and pin GR (compute) channel rings after the CE region of the * channel video-memory allocation. Set false to leave GR rings untranslated * (the pump then only runs the CE channels). |
