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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-26 03:21:37 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-09-26 03:21:37 -0400 |
| commit | d8f1069384dbfb1d8e453e71614a9baaf3438f5c (patch) | |
| tree | 3c005687500e0784462e07004eee4561b8ff586f /kernel/gsp_rm_emulation.c | |
| parent | b84c6dee395dfad6d17b454f83f760053375f791 (diff) | |
| download | open-iov-d8f1069384dbfb1d8e453e71614a9baaf3438f5c.tar.gz open-iov-d8f1069384dbfb1d8e453e71614a9baaf3438f5c.zip | |
gsp_rm: advertise two GRCEs on TU104 (host reports 3 async CEs of 5); CE1 shares GR's runlist/PBDMA
Diffstat (limited to 'kernel/gsp_rm_emulation.c')
| -rw-r--r-- | kernel/gsp_rm_emulation.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/kernel/gsp_rm_emulation.c b/kernel/gsp_rm_emulation.c index 52cf645..7300a8f 100644 --- a/kernel/gsp_rm_emulation.c +++ b/kernel/gsp_rm_emulation.c @@ -1577,13 +1577,15 @@ static void gsp_rm_handle_ce_physical_caps(struct gsp_emu_context *ctx, out_params[4] = TU104_CE_CAPS0; out_params[5] = TU104_CE_CAPS1; - /* The GR-synchronous CEs (GRCE) are the first ones: the client - * picks the last GRCE as its compute companion ("ceForCompute", - * rm_device.c) and every non-GRCE CE becomes an async CE. With - * no GRCE at all the client's context-creation walk ends with an - * empty secondary-engine record and the engine RM alloc is issued + /* The GR-synchronous CEs (GRCE) are the ones sharing the GR + * PBDMA. The client picks the last GRCE as its compute + * companion ("ceForCompute", rm_device.c) and every non-GRCE + * CE becomes an async CE. Measured on the same silicon: two + * GRCEs (host ASYNC_ENGINE_COUNT=3 of 5); with fewer the + * client's context-creation walk ends with an empty + * secondary-engine record and the engine RM alloc is issued * with class 0. */ - if (idx == TU104_GRCE_IDX) + if (TU104_IS_GRCE(idx)) out_params[4] |= TU104_CE_CAPS0_GRCE; } else { *out_status = 0x56; /* NV_ERR_NOT_SUPPORTED */ @@ -1617,7 +1619,7 @@ static void gsp_rm_handle_ce_all_caps(struct gsp_emu_context *ctx, for (i = 0; i < TU104_NUM_CES; i++) { out_params[i * 2 + 0] = TU104_CE_CAPS0; out_params[i * 2 + 1] = TU104_CE_CAPS1; - if (i == TU104_GRCE_IDX) + if (TU104_IS_GRCE(i)) out_params[i * 2 + 0] |= TU104_CE_CAPS0_GRCE; present |= 1ULL << i; } |