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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-01 10:07:14 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-01 10:07:14 -0400 |
| commit | 5f372957a5fd0dd7ca7d4b5f06e959cce92dd49e (patch) | |
| tree | 03000df095fa084c733f87634d92d1b8e8be1e0f /kernel/gsp_phys_boot.h | |
| parent | 4805f88b6d1449d23bf8af2e80a9b2b1984f7189 (diff) | |
| download | open-iov-5f372957a5fd0dd7ca7d4b5f06e959cce92dd49e.tar.gz open-iov-5f372957a5fd0dd7ca7d4b5f06e959cce92dd49e.zip | |
gsp-phys: real GSP boot stages 3d/3e and the GSP-RM run-sequencer event
Stage 3d stages the GSP-RM boot from host sysmem (FMC, radix3 over the GSP-RM ELF, signature, message queues, libos LOGINIT/LOGRM/RMARGS and GSP arguments) and runs Booter Load on SEC2: GSP RISC-V reset, libos mailbox, IMEM/DMEM direct load, BOOTVEC=0, M0==0, FALCON_OS, RISC-V active. Stage 3e links the status queue and polls for GSP-RM events; it now also executes the inline run-sequencer command buffer (event 0x1002) against BAR0 (REG_WRITE/MODIFY/POLL, DELAY, STORE, CORE_* including CORE_RESUME) and then waits for GSP_INIT_DONE 0x1001.
Gated by gsp_phys_boot / gsp_phys_boot_dryrun (default off; the normal load path writes nothing). gsp_phys_fwsec=1 without gsp_phys_boot=1 is refused: a FWSEC-only carve cannot pass the booter-unload handoff gate. Release quiesces the GSP, runs the existing FWSEC-SB/booter-unload teardown and frees all staging.
tools/gen_gsp_bindata.py decodes the public generated archives into the Booter Load image (prod signature patched at 0x8700) and the GSP-RM boot (FMC) image; both are self-checked at build time.
Diffstat (limited to 'kernel/gsp_phys_boot.h')
| -rw-r--r-- | kernel/gsp_phys_boot.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/kernel/gsp_phys_boot.h b/kernel/gsp_phys_boot.h index 3f6ad6e..c305e0a 100644 --- a/kernel/gsp_phys_boot.h +++ b/kernel/gsp_phys_boot.h @@ -52,4 +52,17 @@ int gsp_phys_boot_layout_init(struct gsp_phys_boot *boot, struct pci_dev *pdev, resource_size_t bar1_len); void gsp_phys_boot_layout_fini(struct gsp_phys_boot *boot, struct pci_dev *pdev); +/* + * Record the host-DMA sysmem addresses of the staged boot images in the WPR + * metadata page (stage 3d staging). The layout already set the sizes and + * offsets; this fills the addresses the Booter Load ucode DMAs from. The + * crash-report queue is left at 0 (Turing programs no queue). No device + * access. Returns nonzero when the metadata page is unavailable or a sysmem + * address is zero (the readback proves the store). + */ +int gsp_phys_boot_meta_set_sysmem(struct gsp_phys_boot *boot, + u64 radix3_dma, u64 radix3_size, + u64 fmc_dma, u64 fmc_size, + u64 sig_dma, u64 sig_size); + #endif /* GSP_PHYS_BOOT_H */ |