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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-01 00:55:56 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-01 00:55:56 -0400
commitbef0d867a0d666b98123d4e19edd3084ea95c3c0 (patch)
tree7e32d341455be519ecc64d25822b6a6dde56b16a /kernel/gsp_phys_boot.h
parent5e3ada9c45d72688d1744f6a6191fb2bb4bbd319 (diff)
downloadopen-iov-bef0d867a0d666b98123d4e19edd3084ea95c3c0.tar.gz
open-iov-bef0d867a0d666b98123d4e19edd3084ea95c3c0.zip
gsp-phys: decode the real FB size for the boot layout (stage 3b-prime)
Diffstat (limited to 'kernel/gsp_phys_boot.h')
-rw-r--r--kernel/gsp_phys_boot.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/kernel/gsp_phys_boot.h b/kernel/gsp_phys_boot.h
index 8ab203a..3f6ad6e 100644
--- a/kernel/gsp_phys_boot.h
+++ b/kernel/gsp_phys_boot.h
@@ -8,8 +8,10 @@
/*
* Real-GSP boot bring-up stage 3b: boot-argument DMA memory and the computed
* WPR/FB layout. Allocated and filled by gsp_phys_boot.c while the module owns
- * the physical GPU. Stage 3b writes no device registers; the WPR metadata page
- * is filled in host memory only, ready for the later FWSEC/booter stages.
+ * the physical GPU. Stage 3b writes no device registers; the only device
+ * access is a read-only sample of the video-memory-size register in BAR0, and
+ * the WPR metadata page is filled in host memory only, ready for the later
+ * FWSEC/booter stages.
*/
struct gsp_phys_boot {
bool initialized;
@@ -46,7 +48,8 @@ struct gsp_phys_boot {
bool gsp_phys_layout_enabled(void);
int gsp_phys_boot_layout_init(struct gsp_phys_boot *boot, struct pci_dev *pdev,
- u64 fw_image_size, resource_size_t usable_fb_size);
+ void __iomem *bar0, u64 fw_image_size,
+ resource_size_t bar1_len);
void gsp_phys_boot_layout_fini(struct gsp_phys_boot *boot, struct pci_dev *pdev);
#endif /* GSP_PHYS_BOOT_H */