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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-06 13:35:23 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-06 13:35:23 -0400
commit61c2434533045524dfbb70e4d9aa82c08a5272db (patch)
tree4266364c4853c96f90611cc6483ee82e6b8510ea /docs/tools
parenta1f9d3f7b77e954a1a9ee36c7f787fe2083b544a (diff)
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vgsp: mode-29 construct-last golden execution lane + fetch-aligned USERD control offset
- New mode 29 (GOLDEN_EXEC_LAST): identical to mode 28 but skips the TURING_COMPUTE_A alloc on the client-wired golden channel (every GR object construct there blocks RM); stage 3 completes with the golden handle swapped and BIND/GPFIFO_SCHEDULE/token are accepted. Param clamp 0..29. - Shape bits: bit6 TSG parent (alloc accepted, same no-fetch), bit7 host USERD control offset 0 (THE FETCH FIX: the server applies the sysmem userd_mem base directly and ignores the captured USERD_INDEX_VALUE=3, so GP_PUT/GP_GET live at +0x8c/+0x88; m14: GP_GET advanced 1), bit8 pre-promote compute object (invalid order: RM blocked -110 + NOCAT 0x52a8b04). - Failure diagnostics: REAL GR SEM FAILED now dumps both candidate USERD control offsets (ctl and alt).
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