vgsp: host CUDA bridge + sema release recovery; greeneye simulator wave

- kernel: gsp_cuda_bridge (QMD launch capture, debugfs job/out/done, param+output resolution cached from inline writes), sema drain fixes (never hold/starve a channel), GR ring autopin + counter autoreg, per-page push reads, counter-derive gate; module builds clean
- tools/cuda-bridge: CUDA driver-API daemon executing mail/vadd kernels on the physical GPU, CUBB2/CBD2 v2 protocol, layout check + self-tests
- tools/guest-diag + tools/cuda-ab: scanner/pin fixes, victory push-only mode
- debug/risc-v-gsp-rm-vm: Phase S simulator wave (GSP device model, boot ladder, triage/re-demo harnesses, docs 30-41), GPGPU-sim scaffolding
- STATE-CURRENT/docs updates

1 files changed, 38 insertions, 0 deletions

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+# Admission records — GreenEye-GPGPU-Sim (DRAFT, pending maintainer filing)
+
+> **Status: drafts.** These five records were prepared with the Phase-0
+> program plan and are reproduced here for review. They are **not yet filed**
+> as public eng-ops pilot admissions: a maintainer must review, name the value
+> axis and file them in the public pilot docs before any of these capabilities
+> is treated as admitted. Nothing below changes a threshold after the fact.
+>
+> Per the project admission rule, each record carries all five fields —
+> scenario (loop), measurable outcome, baseline, threshold with N and
+> environment, and failure signal. A missing field means do-not-build, not
+> "deferred". Thresholds were frozen before the first run of each capability.
+>
+> This overlay is development-only; it never becomes a product or guest
+> component, and no record authorises hardware, module, mdev or guest access.
+
+## Draft records
+
+| Record | Tool | Scenario (loop) | Measurable outcome | Baseline | Threshold (N, env) | Failure signal |
+|---|---|---|---|---|---|---|
+| TOOL-2026-SIM-01 | greeneye-gpgpu-sim build/run | porting/RE loop: run a CUDA kernel off-hardware | functional run completes; perf stats emitted; session dir | "no simulator" → static reading only, or QEMU-only | kernel suite 100% functional; build from clean checkout ≤30 min (N=3, this host) | build not reproducible; run non-deterministic |
+| TOOL-2026-SIM-02 | TU104 model calibration | accuracy loop: answer "does the model match?" | C1–C6 metric table vs published bands | GPGPU-Sim SM75 config (uncalibrated) | latency bands ±15%, bandwidth ±20%, correlation ≥0.9 (N≥5 kernels) | metrics fail 2 consecutive releases or are tuned per-kernel |
+| TOOL-2026-SIM-03 | GSP-in-sim (real firmware) | dynamic RE loop: what does firmware do before hardware exists? | session with `cycle` events + boot-progress milestone | QEMU probe (first fault at `0x4009014`) | reaches ≥1 milestone past probe deterministically (N=3 identical) | non-determinism; unexplained delta on replay |
+| TOOL-2026-SIM-04 | MCU cross-controller model | RE/portability: cross-controller exchange | device-level session + latency table | none (no model) | one exchange reproduced with declared sources; latency within documented band | semantics unprovable in one milestone (kill per F8) |
+| TOOL-2026-SIM-05 | sim debugger backend | debugging loop: hook/watch/Ghidra on simulated target | event-parity session vs QEMU on demo | QEMU workflow (minutes) | parity suite green; workflow ≤50% of QEMU baseline time (N=5) | parity broken or slower than baseline |
+
+## Value-axis mapping (to be confirmed at filing)
+
+| Record | Primary value axes |
+|---|---|
+| TOOL-2026-SIM-01 | development velocity on simulated GSP; analysis throughput |
+| TOOL-2026-SIM-02 | performance analysis; correctness of analysis |
+| TOOL-2026-SIM-03 | faster reverse engineering; new-GSP support time |
+| TOOL-2026-SIM-04 | architectural understanding / SBOM; device support |
+| TOOL-2026-SIM-05 | bug-analysis time; guest-compat readiness |
+
+P4 (fabric/system) maps to a fabric value axis only once a peer model exists;
+it is deliberately not filed here.