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<title>open-iov.git/tools/test, branch gr-forwarding</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=gr-forwarding</id>
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<updated>2026-10-02T07:31:06+00:00</updated>
<entry>
<title>gsp-phys: P6a - real copy engine reads/writes guest RAM pages</title>
<updated>2026-10-02T07:31:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T07:24:35+00:00</published>
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<id>urn:sha1:d2de7bf1d6bb7d0931085f87da6c3013cd7f1aca</id>
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- file-backed guest RAM (launcher memory-backend-file share=on) and
  in-kernel GPA-&gt;HPA translation through the shared file page cache
  (read_cache_page + page_to_phys + pfn_valid), opened O_LARGEFILE;
  new default-off gsp_phys_guest_mem parameter
- debugfs gsp-phys-guest-ram (path + gpa/off/size ranges) and
  gsp-phys-guest-gpa (one pinned GPA per boot); rm-call triggers 6/7 run
  host-&gt;guest and guest-&gt;host 4 KiB CE copies; trigger 8 is a PTE
  self-test through a fresh slot
- guest page-table slots are pre-built during ladder stage 3: runtime
  PTE writes into an already-walked page-table line are not observed
  without a TLB invalidate
- guest RAM layout (q35 4.2, 4 GiB): below-4G GPA == file offset,
  above-4G offset = GPA - 0x80000000 (2 GiB PCI hole)
- tests: tools/test/gpage_test.c guest probe; docs + STATE-CURRENT
  record the live green (G2H/W2G with semaphore release, guest observed
  the write, smoke ALL OK 64/64, clean latched release)
</content>
</entry>
<entry>
<title>guest-diag: cdt2 mapping scan is opt-in (CDT_SCAN=1); it can wedge the client</title>
<updated>2026-09-30T12:40:17+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T12:40:17+00:00</published>
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<id>urn:sha1:126bf47b524d9de254fb6e4c62f5ac14dd687159</id>
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</entry>
<entry>
<title>guest-diag: cdt2 payload scan limited to anon mappings (device-mapping reads can block)</title>
<updated>2026-09-30T12:25:49+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T12:25:49+00:00</published>
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<id>urn:sha1:9d7bb10c06b882f5164ab47a74caa6bee97de0b5</id>
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</content>
</entry>
<entry>
<title>guest-diag: cdt2 payload scan only touches anon/device mappings (avoid SIGBUS on truncated file maps)</title>
<updated>2026-09-30T12:08:32+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T12:08:32+00:00</published>
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</content>
</entry>
<entry>
<title>guest-diag: cdt2 scans its own mappings for the payload after HtoD (DtoH mechanism probe)</title>
<updated>2026-09-30T11:25:45+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T11:25:45+00:00</published>
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<id>urn:sha1:0ffc3bf8effd69af2910ad38294cb99894c6b44b</id>
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</content>
</entry>
<entry>
<title>sema-svc: decode GRCE inline-data DMA (small HtoD path)</title>
<updated>2026-09-30T10:13:26+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T10:13:26+00:00</published>
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<id>urn:sha1:4c1eff4b6af581187b847bd61a9f846bafca2713</id>
<content type='text'>
The 256-byte cuMemcpyHtoD payload never appears in any CE push: CUDA
submits it on the compute channel as a compute-class DMA whose source is
the push's own inline data (LINE_LENGTH_IN=256, OFFSET_OUT=&lt;device VA&gt;,
LAUNCH_DMA=0x41, LOAD_INLINE_DATA 64 dwords, then the channel's
SET_REPORT_SEMAPHORE release). The CE-shaped decoder skipped the data run
(opcode 3) and no GR work ran at all.

- Decode NVC5C0 GRCE methods on subchannel 1 (LINE_LENGTH_IN, LINE_COUNT,
  OFFSET_OUT/UPPER, LAUNCH_DMA) and the opcode-3 LOAD_INLINE_DATA run.
- svc_grce_inline_write resolves the destination VA through trusted
  sources (pins, map, published page directories, targeted rm_mem
  resolve), pins the page and writes into vidmem or guest RAM; budgeted
  sema-grce logs name the target or report UNRESOLVED.
- cdt2 test binary gains CDT_CP_PAUSE / CDT_HP_PAUSE for live inspection
  of the copy path; pushed by push_guest_tools.sh.
</content>
</entry>
<entry>
<title>guest-diag: cdt CDT_WAIT park-at-end (live memory inspection); run_cycle CDT_WAIT passthrough</title>
<updated>2026-09-30T09:38:31+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T09:38:31+00:00</published>
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<id>urn:sha1:a213fd708dac4494b796bcc9becee1ad4e598b49</id>
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</content>
</entry>
<entry>
<title>guest-diag: run_cycle SKIP_OPS knob + cdt output on serial; cdt richer roundtrip diagnostics</title>
<updated>2026-09-30T08:41:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T08:41:06+00:00</published>
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</content>
</entry>
<entry>
<title>gsprm: reply-latency logging + param dump cap; guest-diag: CDT_PAUSE, watcher reaping, wider CE stream window</title>
<updated>2026-09-30T04:06:42+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T04:06:42+00:00</published>
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<id>urn:sha1:5cad2f2cc680333061ef53378b46280fb352e450</id>
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</entry>
<entry>
<title>guest-diag: adaptive miss-driven pinner; cdt holds on failure for inspection</title>
<updated>2026-09-28T17:14:16+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-28T17:14:16+00:00</published>
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pin_miss_pages.sh watches the host journal for release-miss VAs, resolves
each page for the live cdt pid through the guest pagemap and injects it (the
injection rewinds the pump so releases consumed under a stale pin are
re-read); it re-pins when a new cdt pid appears.  cuda_drv_test prints
cuGetErrorName/String on failure and, with CDT_HOLD=&lt;seconds&gt;, stays alive so
the RM error record and tracker state can be inspected after cuCtxCreate has
given up.
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</entry>
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