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<title>open-iov.git/tools/guest-diag/semfix_uvmt.py, branch cs-share</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=cs-share</id>
<link rel='self' href='https://git.vgpu.io/open-iov.git/atom?h=cs-share'/>
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<updated>2026-10-02T19:13:06+00:00</updated>
<entry>
<title>kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh</title>
<updated>2026-10-02T19:13:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:13:06+00:00</published>
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<id>urn:sha1:c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d</id>
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- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
  batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
  old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
  PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
  geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
  parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
  /sys/kernel/debug/vgsp/, vgsp-&lt;subsystem&gt;: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
  tool updates; README/SBOM/install/Makefile sync

Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
</content>
</entry>
<entry>
<title>guest-diag: reset per-client pin state when a new client pid appears</title>
<updated>2026-09-30T14:06:20+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T14:06:20+00:00</published>
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<id>urn:sha1:262b3c0e9753f4320b8f84cd1ca408384b6f25ff</id>
<content type='text'>
A new CUDA client allocates fresh channel pools at the same GPU VAs; the
watcher kept the previous client's sem kptrs and seen-pin marks, so it
pinned the previous (freed) pool pages and the new client's release writes
went to dead memory. Clear the learned sems/marks on each pid change.
</content>
</entry>
<entry>
<title>guest-diag: pushbuffer pin survives PTI holes (full-range scan + bounded retries until complete)</title>
<updated>2026-09-30T09:28:13+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-30T09:28:13+00:00</published>
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<id>urn:sha1:14f195400a14034612fd9b1f69fb6296419eae6d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>guest-diag: semfix counter-pin retry backoff + shorter exec timeout (stops guest-agent starvation)</title>
<updated>2026-09-29T22:08:38+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T22:08:38+00:00</published>
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<id>urn:sha1:035bd0e17ae0e5d3786bf250481883200c25feeb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>guest-diag: stream uvbp pushbuffer kptrs for immediate pinning</title>
<updated>2026-09-29T21:27:48+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T21:27:48+00:00</published>
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<id>urn:sha1:fcb74dfd32442af859ac45979138b40279f96553</id>
<content type='text'>
The first CE channel's push-buffer was only pinned ~1 minute after the
client's failure: uvbp fired at t+4s but semfix's trace read (guest agent,
every 5 loops) picked it up at t+70s, so the tracker wait for value 3 spun
for 16 s. The guest scanner now emits '#pb 0x&lt;kptr&gt;' from the uvbp trace
lines as soon as they appear; the host mirrors them into the sem stream and
semfix resolves/pins the push-buffer through the UVM chain on the next loop
(sub-second).
</content>
</entry>
<entry>
<title>sema-svc: persist GR counter slot per channel; stable slot layout; bulk pin queue 4k</title>
<updated>2026-09-29T20:14:12+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T20:14:12+00:00</published>
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<id>urn:sha1:6d5131e87a2c9cb5c20437669c1917f7be6252b5</id>
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- counter_pa autoreg result is written back to the channel table so later
  passes cannot re-target a different slot when the live GR count changes
  during teardown; re-registration of the same channel preserves the slot.
- counter slot layout uses the max GR count ever seen in the generation
  instead of the shrinking live count.
- sema_map_add queue 64 -&gt; 4096 entries so a full-window pin burst drains
  without ENOSPC retries.
- pin_gr_stream: one batched sudo pass per flush (was one process per run,
  ~4 s for 400 runs), retrying only queue-rejected runs.
- semfix_uvmt: SEMFIX_SKIP_PB=1 skips the blocking push-buffer chain walk
  when the vsock window stream already supplies those pages.
</content>
</entry>
<entry>
<title>sema-svc: apply releases before push memsets; poller: bypass read cache</title>
<updated>2026-09-29T19:34:18+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T19:34:18+00:00</published>
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<id>urn:sha1:b7636afd9715748396325ec4dd0899c7f42ece17</id>
<content type='text'>
</content>
</entry>
<entry>
<title>guest-diag: stream uvmt sems over vsock (no guest-agent race); dump channel last release VA; larger push log budget</title>
<updated>2026-09-29T19:24:31+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T19:24:31+00:00</published>
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<id>urn:sha1:f4803e303e1e4bfde9f241ec3b6226399d01825d</id>
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</content>
</entry>
<entry>
<title>sema-svc: never apply swept-page releases with no live channel (guest boot corruption); tooling guards</title>
<updated>2026-09-29T19:19:34+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T19:19:34+00:00</published>
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<id>urn:sha1:40411a6837620097efe2cf15f322f0526ae45385</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sema-svc: apply decoded releases to registered counter slots; single-QMP semfix+uvmt watcher</title>
<updated>2026-09-29T19:16:39+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T19:16:39+00:00</published>
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</content>
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