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<title>open-iov.git/tools/guest-diag/phys_claim_cycle.sh, branch m31</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=m31</id>
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<updated>2026-10-02T19:13:06+00:00</updated>
<entry>
<title>kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh</title>
<updated>2026-10-02T19:13:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:13:06+00:00</published>
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<id>urn:sha1:4bb8550a72597ec098c6d62a75006a0aba61972e</id>
<content type='text'>
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
  batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
  old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
  PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
  geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
  parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
  /sys/kernel/debug/vgsp/, vgsp-&lt;subsystem&gt;: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
  tool updates; README/SBOM/install/Makefile sync

Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
</content>
</entry>
<entry>
<title>gsp-phys: freeze-safe release, boot-proof READY, and guest-wiring P2/P3/P5-wave1</title>
<updated>2026-10-02T06:07:52+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T06:07:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=129991a063cbef7cdfc7f10faafdb97107d15e14'/>
<id>urn:sha1:129991a063cbef7cdfc7f10faafdb97107d15e14</id>
<content type='text'>
Host-freeze fix bundle (validated 2/2 supervised cycles):
- power unlock now latches D0/D3cold by default (new gsp_phys_repower,
  default 0); releasing the claim can no longer power-gate the board and
  hard-freeze the host on resume
- bounded post-rebind readiness gate before dropping the locks; bounded D0
  settle/verify before the unbind
- READY means a live GSP-RM session: the async worker and the module-owned
  join only expose READY when init-done is seen and no unload was sent;
  otherwise the claim is released fail-open
- FWSEC reads DMEM0/IMEM back before STARTCPU and fails fast when the
  staging is not visible
- the claim harness leaves the board latched by default and takes
  --restore-power to opt back into the old restore

Guest-wiring:
- P2: generation-keyed fn65 static-config snapshot cache plus a default-off
  identity overlay (new gsp_phys_static_live) for name/short-name/VBIOS;
  the probe cycle runs once per backend generation at READY
- P3: default-off read-only RM_CONTROL forwarding whitelist (new
  gsp_phys_ctrl_forward) with emulated-handle translation to the adopted
  server handles and full emulation fallback
- P5 wave 1: default-off shadow execution of guest CE pushes on the ladder
  channel (new gsp_phys_work_forward) via a dedicated ordered work item;
  the ladder stage-4 submission is refactored into a shared bounded helper
  and the software release path stays authoritative

Live: module-owned boot to init-done, guest smoke ALL OK 64/64 with P2/P3
enabled, 514 shadow copies observed on the physical CE; all cycles released
cleanly with WPR2 down and no reboot.
</content>
</entry>
<entry>
<title>guest-diag: treat the benign TX-header status line as non-fatal in the claim harness</title>
<updated>2026-10-01T20:40:57+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T20:40:57+00:00</published>
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<id>urn:sha1:53c9e5fa268a1ff60533ae1cf25b1627cf224980</id>
<content type='text'>
</content>
</entry>
<entry>
<title>guest-diag: add --nocat for the next diagnostic boot</title>
<updated>2026-10-01T15:55:25+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T15:55:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=8512314069a9f222d96606aa05449e13f0343a0e'/>
<id>urn:sha1:8512314069a9f222d96606aa05449e13f0343a0e</id>
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</content>
</entry>
<entry>
<title>guest-diag: allow selecting the staged GSP firmware with --fw</title>
<updated>2026-10-01T15:46:07+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T15:46:07+00:00</published>
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<id>urn:sha1:306b0d41bd5d73f4792b0402983d12f140150c21</id>
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</entry>
<entry>
<title>guest-diag: add --boot/--boot-dryrun/--keep to the claim harness</title>
<updated>2026-10-01T14:07:15+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T14:07:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=10e17e08487182342a4e13cbe50b73f250089db3'/>
<id>urn:sha1:10e17e08487182342a4e13cbe50b73f250089db3</id>
<content type='text'>
--boot is the only device-writing mode (full boot lifecycle: FWSEC, Booter Load, RISC-V start, FALCON_OS, RM-init poll). --boot-dryrun rehearses the host staging read-only. --keep leaves a green claimed session running. --fwsec is retired and refused at parse time: a FWSEC-only carve is not host-recoverable on this part.
</content>
</entry>
<entry>
<title>guest-diag: add --fwsec to the supervised claim harness (stage-3c write run)</title>
<updated>2026-10-01T11:27:47+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T11:27:47+00:00</published>
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<id>urn:sha1:cc7ec3a0c8cd282b12425bfd37763584e93320f4</id>
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</entry>
<entry>
<title>gsp-phys: read-only FWSEC dry-run mode; match the 6-byte BIT token decode</title>
<updated>2026-10-01T11:22:09+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T11:22:09+00:00</published>
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<id>urn:sha1:e7c068e2e831c6c85e233578767fffe591876a88</id>
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</content>
</entry>
<entry>
<title>guest-diag: reusable supervised physical-claim cycle harness (D0 pre-lock + abort checks)</title>
<updated>2026-10-01T04:52:09+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-01T04:52:09+00:00</published>
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<id>urn:sha1:e25fc450abda40e54f4bfa7e59456a6ee8153a18</id>
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