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<title>open-iov.git/tools/guest-diag/inject_counters.sh, branch master</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=master</id>
<link rel='self' href='https://git.vgpu.io/open-iov.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/'/>
<updated>2026-10-08T15:53:20+00:00</updated>
<entry>
<title>spdx: add BSD-3-Clause identifiers to userspace/tools/scripts sources</title>
<updated>2026-10-08T15:53:20+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-08T15:53:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=2ee4fe8f43b0dc3e080c91931eadade1fd636c27'/>
<id>urn:sha1:2ee4fe8f43b0dc3e080c91931eadade1fd636c27</id>
<content type='text'>
Sweep of the 155 tracked C/Python/shell files under userspace/ (excluding
the MIT-licensed vendored userspace/extern/), tools/ and scripts/ that had
no per-file license identifier. Each gains the minimal two-line header in
the area's existing form: 'SPDX-License-Identifier: BSD-3-Clause' plus
'Copyright (c) 2026 Open-IOV contributors'; shebang and coding lines stay
first. No other content touched. kernel/** is deliberately out of scope
(recorded as a follow-up in CODESTD-REPORT-2026-10-08.md): its SPDX
coverage and MODULE_LICENSE normalization need their own GPL-2.0 pass.
</content>
</entry>
<entry>
<title>kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh</title>
<updated>2026-10-02T19:13:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:13:06+00:00</published>
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<id>urn:sha1:c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d</id>
<content type='text'>
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
  batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
  old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
  PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
  geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
  parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
  /sys/kernel/debug/vgsp/, vgsp-&lt;subsystem&gt;: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
  tool updates; README/SBOM/install/Makefile sync

Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
</content>
</entry>
<entry>
<title>guest-diag: injector handles slow chan_dump (3s wait, last-marker parse)</title>
<updated>2026-09-29T16:40:43+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T16:40:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=e5df089777edf3bccdcc279e6e29b4c701035995'/>
<id>urn:sha1:e5df089777edf3bccdcc279e6e29b4c701035995</id>
<content type='text'>
</content>
</entry>
<entry>
<title>guest-diag: semfix watcher (stale sem-pool VA-&gt;PA from guest truth); injector marker-based handle discovery</title>
<updated>2026-09-29T16:17:11+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T16:17:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=23c3754ecb231cb7b57bf2f2a81f241a91b09189'/>
<id>urn:sha1:23c3754ecb231cb7b57bf2f2a81f241a91b09189</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sema-svc: async VA-&gt;PA injection queue; guest-diag: fast counter+pin injector, wait sampler</title>
<updated>2026-09-29T15:55:15+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T15:55:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=737aea63e67aef4c8dbc1bdf496138215aaaff3e'/>
<id>urn:sha1:737aea63e67aef4c8dbc1bdf496138215aaaff3e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>tools: inject_counters.sh - counter index order is descending by handle</title>
<updated>2026-09-29T13:44:56+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T13:44:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=a7ca1054824f0d205514451d7c100fadaf40ea7a'/>
<id>urn:sha1:a7ca1054824f0d205514451d7c100fadaf40ea7a</id>
<content type='text'>
Live verification: the trackers waiting on counter slots idx2/idx3 belong
to the channels 2nd/3rd from the top of the ascending handle list, and the
only channel whose GPFIFO put advanced to 2 was the 4th from the top,
whose tracker polled idx3. Zip descending handles with ascending counter
indices by default; ORDER=asc restores creation order.
</content>
</entry>
<entry>
<title>tools: durable guest counter enumeration/injection and VA reader</title>
<updated>2026-09-29T12:53:11+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-09-29T12:53:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=6e04a93838cdebbcf9183278cb71bdf1b4235cdc'/>
<id>urn:sha1:6e04a93838cdebbcf9183278cb71bdf1b4235cdc</id>
<content type='text'>
The counter enumeration/injection workflow lived in the guest's /tmp and was
lost on every restart. Make it durable under tools/guest-diag:

- sem_counters.py: translate a process's per-channel u32 completion counters
  (16-byte stride in the /dev/nvidiactl counter page) to guest PAs through
  /proc/&lt;pid&gt;/pagemap; --pairs emits handle,va,pa triples.
- sem_slots.py: read/write the counter slots via /proc/&lt;pid&gt;/mem (fallback
  for the host counter publish).
- read_va.py: hex dump a process VA (UVM sysmem GPU VAs are usually valid
  CPU VAs in the owning process); --u32 for method streams.
- inject_counters.sh: host-side one-shot: push the tool, take the GR handles
  from the live chan_dump, enumerate, then register each counter with
  sema_counter and pin its VA with sema_map_add.
- push_guest_tools.sh: push the new tools after every VM start.
- launch_qemu_direct.sh: parameterized mdev UUID/paths instead of a stale
  hardcoded one; committed so it survives checkouts.
</content>
</entry>
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