open-iov.git/kernel, branch cs-share Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers https://git.vgpu.io/open-iov.git/atom?h=cs-share 2026-10-06T23:34:01+00:00 vgsp: mode 34 - context-share golden execution lane (compile-verified, untested) 2026-10-06T23:34:01+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T23:34:01+00:00 urn:sha1:0be388f76468a99cec4bd88252d2fea4c3b5a70b Mode 34 allocates FERMI_CONTEXT_SHARE_A (0x9067) on the ladder TSG before the golden replay; the replay's golden channel A (0xcaf00054) attaches to the share with hVASpace=0 and keeps the captured unwired shape, runs its 9-entry promote and carries TURING_A (0xc597) plus a TURING_COMPUTE_A (0xc5c0, handle 0xcaf00090). V6 (0xcaf00034) attaches to the same share, constructs no class object of its own, and its FWCLIENT promote is suppressed; stage 4 and the forwarded launches run on V6 in A's shared VEID/subcontext. Default off; all paths gated by gsp_phys_rmcall_gr_promote=34. New pr_info cycle landmarks for the share alloc, A alloc/promote, A construct (rpc_result), V6 alloc and the instance/RAMFC decode. No hardware run. vgsp: mode 33 construct A object pre-promote (m43 post-promote 0x57) 2026-10-06T21:55:05+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T21:55:05+00:00 urn:sha1:556739301fe8c5387171b1513ddff8d5da551a9c vgsp: mode 33 - wired golden sibling A as execution channel (compile-verified, untested) 2026-10-06T21:51:49+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T21:49:27+00:00 urn:sha1:789b145638daf452f550762ad3143fb8a73f1082 vgsp: SKED/FE readback + QMD w50..53 + two-step PCAS gate (m41 instrumentation) 2026-10-06T21:37:50+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T21:37:50+00:00 urn:sha1:930789eafcb2ed05929c5ca8f92b5fda3b58875c vgsp: m37 pcas gate (window-only stock form) + QMD w48..50 post-mortem 2026-10-06T21:05:16+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T21:05:16+00:00 urn:sha1:c8b9b89b15c334ea61e8fba635763e406e7b9f0c vgsp: preserve the pointer page offset in the shadow QMD rewrite (program +0x800) 2026-10-06T20:43:42+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T20:43:42+00:00 urn:sha1:1216d19c93b390abbd761f3ad817afe69325f1a9 vgsp: m32 rank-2 qmdwin - relocate the inline-QMD destination to a proven ring-chunk page (compile-verified, untested) 2026-10-06T20:29:29+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T19:41:01+00:00 urn:sha1:191100b51d1e6ed36bf4ff776107d551c4793621 vgsp: mode 31 sibling A promote skips the one-shot FECS entry (m30: atomic 0x1f) 2026-10-06T20:21:43+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T20:21:43+00:00 urn:sha1:b214240b3b55d60e6441909489e9ceee934a24c0 vgsp: mode 31 sibling A free ChID index (m29 decode: fixed index 3 collided with D) 2026-10-06T20:19:53+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T20:19:53+00:00 urn:sha1:9fefe8d533acdb0e73e66de29166d99ab4f5e4bd vgsp: mode 31 sibling A userd memdesc (m28: TSG channel alloc rejected without it) 2026-10-06T19:52:25+00:00 Arthur Hanson Rasmusson arthur@vgpu.io 2026-10-06T19:52:25+00:00 urn:sha1:5b8dcda83558edec4657f79c3de621f74661cdde