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<title>open-iov.git/kernel/gsp_phys_gpu.h, branch golden-replay</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=golden-replay</id>
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<updated>2026-10-05T21:16:18+00:00</updated>
<entry>
<title>vgsp: add golden-replay mode 25 (captured client construct + atomic 9-entry promote)</title>
<updated>2026-10-05T21:16:18+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T21:16:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=fc8d7923c83c6babd0ee8c23565ac18b709fa5a5'/>
<id>urn:sha1:fc8d7923c83c6babd0ee8c23565ac18b709fa5a5</id>
<content type='text'>
Ladder mode 25 reproduces the real 570.144 host client's golden-image
construct on the golden replay handles: captured channel shape (flags
0x00200320, hObjectBuffer 0, gpFifoOffset 0, gpFifoEntries 0x20,
engineType 1, host memdesc substitutions), a single atomic 9-entry
GPU_PROMOTE_CTX on the golden channel (MAIN id0 and PATCH id2 combined,
ids 3/4/5/6 VA-only globals, ids 9/10/11 FECS/PRIV/UNR combined), then
the TURING_A 3D object. The golden VAS/channel/3D object stay alive and
the existing V6 FWCLIENT promote follows on the golden-initialized
GR-instance state; a failed golden step aborts with no retry and no
follow-up promote. The captured VAS COPY_SERVER_RESERVED_PDES control is
implemented gated (fwclient mask bit 8, zero-level no-op form) because
its level PAs are server-internal. Mode clamp/name/help extended to 25;
modes 1-24 unchanged.
</content>
</entry>
<entry>
<title>vgsp: FWCLIENT entry-selection mask and golden-replay hardening</title>
<updated>2026-10-05T20:04:33+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T20:04:33+00:00</published>
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<id>urn:sha1:7c1fceb5654cda3628531214934b93e96a507700</id>
<content type='text'>
- gsp_phys_rmcall_fwclient_mask (default 0x3f): per-entry selection for the
  mode-24 FWCLIENT promote set; bit6 selects the MAIN UVM VA-only shape.
- golden replay: tolerate the client-local system-memory PB step and continue
  with hObjectBuffer=0; on-ladder TURING_A 3D object retained best-effort.

Live bisection on the KMD channel: MAIN alone reaches the per-buffer commit
and stops at the engine-context memdesc state; PM-only and PATCH-only are
accepted; any multi-entry control containing MAIN is refused 0x1f. All
cycles release clean.
</content>
</entry>
<entry>
<title>vgsp: GR golden-replay groundwork and FWCLIENT promote mode 24</title>
<updated>2026-10-05T19:58:43+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T19:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=5a77352f78e6cd28280f2dc559f677d31ae25c38'/>
<id>urn:sha1:5a77352f78e6cd28280f2dc559f677d31ae25c38</id>
<content type='text'>
- golden replay (gsp_phys_rmcall_golden, default off): replay the stock
  client's post-load golden channel allocations (separate VAS, pushbuffer
  objects, USERD, bare GR channel, TURING_A 3D object) before the ladder
  channel; best-effort: a failure warns and the ladder continues.
- on-ladder TURING_A (0xc597) 3D object allocation before the compute
  object (best-effort) to initialize server-side GR-instance state.
- promote mode 24: the reference FWCLIENT non-3D set (MAIN, PM, PATCH,
  FECS_EVENT, PRIV_ACCESS_MAP, UNRESTRICTED_PRIV_ACCESS_MAP) as one
  GPU_PROMOTE_CTX on the KMD channel, with per-entry logging and explicit
  omission semantics; mode clamps/descriptions extended to 24.

Live: mode 23 soft-stops 0x1f on the server-managed shared channel and
reaches the per-buffer commit on the KMD channel, where it stops at the
missing engine-context memdesc; mode 24 emits all six entries and is
refused with 0x1f before BIND. All cycles release clean, GPU green.
</content>
</entry>
<entry>
<title>vgsp: srv_ctxcommit mode 2 (V6 client combined init+VA entry)</title>
<updated>2026-10-05T18:03:48+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T18:03:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=aff698d003d256a41bf7d4062bb81792457d3219'/>
<id>urn:sha1:aff698d003d256a41bf7d4062bb81792457d3219</id>
<content type='text'>
Make gsp_phys_rmcall_srv_ctxcommit an int mode: 1 (default) = map +
INITIALIZE_CTX + UVM-shape VA-only promote; 2 = V6 client variant, no
INITIALIZE_CTX and one combined PA+VA MAIN entry with bInitialize=1 and
bNonmapped=0 so the first ctxsw initializes from the golden image; 0 = pure
server-managed. Lets the next supervised cycle bisect both entry shapes
without a rebuild. Build clean; not hardware-tested (GPU wedged).
</content>
</entry>
<entry>
<title>vgsp: guest GR forwarding backend and capture (gsp_phys_gr_forward, default off)</title>
<updated>2026-10-05T17:40:24+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T17:06:39+00:00</published>
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<id>urn:sha1:d3f061966bb9e23fdba7f6cc0aa231acdf31f36e</id>
<content type='text'>
Add a default-off guest GR (compute) forwarding path so a guest CUDA
launch submitted on its GR channel can be executed by the physical GR
engine on the ladder channel, with fail-closed fallback to the host CUDA
bridge and the unchanged software release path.

- New module parameter gsp_phys_gr_forward (default 0) and accessor.
- New GR execution gate: boot_stage.rmcall_gr_exec_ok, latched only after
  a real GR submission logs REAL GR SEM OK; the backend refuses while it
  is unset.
- Sema capture: a completed 64-word inline QMD on a trusted, non-replay
  GR decode becomes an svc_gr_cand (push identity, decoded release0,
  parameter/program/pointer fields, up to 8 captured inline-write
  records); the CUDA bridge stays authoritative while the parameter is
  off and is reached in order forward -&gt; bridge -&gt; software release.
- Backend: gsp_phys_backend_guest_gr_submit() maps pages at their own
  guest VAs through fresh Tier-1 small-PT pages/PDE installs or relocates
  inline-captured pages to ladder shadow pages (Tier 2), builds
  SET_OBJECT + the inline-QMD method run + REPORT_SEMAPHORE on the
  compute subchannel, reuses the shared GPFIFO/USERD/doorbell publish
  tail (extracted from the CE submit path, CE bytes unchanged) and polls
  the QMD release and/or module semaphore, draining the epoch-gated
  fault queue on timeout.
- Sema wiring: GR requests reuse the INFLIGHT/hold/deferral machinery so
  the guest channel release applies only on the submit's success/failure
  edge; hold shims preserve the channel engine type.
- Counters and a work_gr state line plus a stats accessor.
- Bounds are fixed: 16 pages, 8 inline records, 64 QMD words; every
  pointer/size checked, pool exhaustion and stale mappings fail closed.
- New ABI layouts pinned with static_asserts.

Compile-only change: no device test performed.

(cherry picked from commit ae507e6f241c7e3498728f9d1ffc2d41ede5cd64)
</content>
</entry>
<entry>
<title>vgsp: add gsp_phys_rmcall_channel to force one GR channel variant</title>
<updated>2026-10-05T17:40:15+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T17:40:15+00:00</published>
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<id>urn:sha1:d07555097d5f46d0f51c98572a220235ea5fcc0d</id>
<content type='text'>
Lets a bisection pair any promote shape with any channel shape, in
particular V6 (SKIP_CTXBUFFER_ALLOC, KMD-managed) with the server-managed
VA-only promote: with skip-ctxbuffer the server's kgrctxMapCtxBuffers does
not pre-book the engine context vaList, so the VA branch's
vaListSetManaged(NV_FALSE) gate should pass and the per-buffer commit can
program the engine context VA. Default 0 keeps the mode-selected walk
byte-identical. Not hardware-tested (GPU wedged; see Handoff ADDENDUM 51).
</content>
</entry>
<entry>
<title>vgsp: GR server-managed context commit experiments (EVICT, VA promote, external path)</title>
<updated>2026-10-05T17:39:25+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T17:39:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=97e7d0136fe63b08823d8b66d5bab84cfecf435b'/>
<id>urn:sha1:97e7d0136fe63b08823d8b66d5bab84cfecf435b</id>
<content type='text'>
Rung-2 bisection after the GET_CTX_BUFFER_INFO ABI fix made the server ctx
geometry visible (8 buffers; MAIN 0x133000 FBMEM, PATCH 0x5000):

- map the server MAIN/PATCH at the ladder ctx VAs with FBMEM PTEs and send
  the UVM-shape VA-only promote (bInitialize=0, bNonmapped=0). On the shared
  VAS the per-entry VA branch calls vaListSetManaged(NV_FALSE) and returns
  0x40 because the server pre-booked MAIN as managed; EVICT_CTX (status 0)
  does not release that booking.
- try the same VA promote on the external VAS where the server did not book
  (kgrctxMapCtxBuffers early-returns): the promote never replies (-110) and
  leaves the device in the locked fail-safe (WPR2 up, unbound). Do not repeat
  this shape without a new hypothesis.
- FBMEM physAttr selection for the server MAIN fixed (aperture 2 -&gt; 0x4);
  gsp_phys_rmcall_srv_ctxcommit parameter added (0 = pure server-managed,
  no client promote).
- query prints all 16 entries and records PATCH; query ABI 80-B/5136.

Hardware state after the external-VAS run: GPU wedged, reboot required (no
automated reboot). All shapes stay default-off behind gr_promote=17 +
gsp_phys_srv_ctxbuf.
</content>
</entry>
<entry>
<title>vgsp: host CUDA bridge + sema release recovery; greeneye simulator wave</title>
<updated>2026-10-03T18:05:38+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-03T18:05:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=cc79b478843f0230fe6aa8ecd822de7ba71c891e'/>
<id>urn:sha1:cc79b478843f0230fe6aa8ecd822de7ba71c891e</id>
<content type='text'>
- kernel: gsp_cuda_bridge (QMD launch capture, debugfs job/out/done, param+output resolution cached from inline writes), sema drain fixes (never hold/starve a channel), GR ring autopin + counter autoreg, per-page push reads, counter-derive gate; module builds clean
- tools/cuda-bridge: CUDA driver-API daemon executing mail/vadd kernels on the physical GPU, CUBB2/CBD2 v2 protocol, layout check + self-tests
- tools/guest-diag + tools/cuda-ab: scanner/pin fixes, victory push-only mode
- debug/risc-v-gsp-rm-vm: Phase S simulator wave (GSP device model, boot ladder, triage/re-demo harnesses, docs 30-41), GPGPU-sim scaffolding
- STATE-CURRENT/docs updates
</content>
</entry>
<entry>
<title>kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh</title>
<updated>2026-10-02T19:13:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:13:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d'/>
<id>urn:sha1:c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d</id>
<content type='text'>
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
  batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
  old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
  PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
  geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
  parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
  /sys/kernel/debug/vgsp/, vgsp-&lt;subsystem&gt;: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
  tool updates; README/SBOM/install/Makefile sync

Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
</content>
</entry>
<entry>
<title>gsp-phys: GR engine context allocate/map/promote before the GR sem push (default off; live-unverified at promote)</title>
<updated>2026-10-02T14:58:17+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T14:58:17+00:00</published>
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<id>urn:sha1:2f249817df327f5dcccf0464ad517fa60d6071d3</id>
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</content>
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