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<title>open-iov.git/kernel/gsp_phys_booter.c, branch gr-forwarding</title>
<subtitle>Open-IOV vGPU-IO: host-side GSP emulation for unmodified NVIDIA guest drivers
</subtitle>
<id>https://git.vgpu.io/open-iov.git/atom?h=gr-forwarding</id>
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<updated>2026-10-05T17:06:39+00:00</updated>
<entry>
<title>vgsp: guest GR forwarding backend and capture (gsp_phys_gr_forward, default off)</title>
<updated>2026-10-05T17:06:39+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T17:06:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=ae507e6f241c7e3498728f9d1ffc2d41ede5cd64'/>
<id>urn:sha1:ae507e6f241c7e3498728f9d1ffc2d41ede5cd64</id>
<content type='text'>
Add a default-off guest GR (compute) forwarding path so a guest CUDA
launch submitted on its GR channel can be executed by the physical GR
engine on the ladder channel, with fail-closed fallback to the host CUDA
bridge and the unchanged software release path.

- New module parameter gsp_phys_gr_forward (default 0) and accessor.
- New GR execution gate: boot_stage.rmcall_gr_exec_ok, latched only after
  a real GR submission logs REAL GR SEM OK; the backend refuses while it
  is unset.
- Sema capture: a completed 64-word inline QMD on a trusted, non-replay
  GR decode becomes an svc_gr_cand (push identity, decoded release0,
  parameter/program/pointer fields, up to 8 captured inline-write
  records); the CUDA bridge stays authoritative while the parameter is
  off and is reached in order forward -&gt; bridge -&gt; software release.
- Backend: gsp_phys_backend_guest_gr_submit() maps pages at their own
  guest VAs through fresh Tier-1 small-PT pages/PDE installs or relocates
  inline-captured pages to ladder shadow pages (Tier 2), builds
  SET_OBJECT + the inline-QMD method run + REPORT_SEMAPHORE on the
  compute subchannel, reuses the shared GPFIFO/USERD/doorbell publish
  tail (extracted from the CE submit path, CE bytes unchanged) and polls
  the QMD release and/or module semaphore, draining the epoch-gated
  fault queue on timeout.
- Sema wiring: GR requests reuse the INFLIGHT/hold/deferral machinery so
  the guest channel release applies only on the submit's success/failure
  edge; hold shims preserve the channel engine type.
- Counters and a work_gr state line plus a stats accessor.
- Bounds are fixed: 16 pages, 8 inline records, 64 QMD words; every
  pointer/size checked, pool exhaustion and stale mappings fail closed.
- New ABI layouts pinned with static_asserts.

Compile-only change: no device test performed.
</content>
</entry>
<entry>
<title>vgsp: GR ctx query ABI fix, server-managed ctx map exclusion, raw diag capture</title>
<updated>2026-10-05T16:50:44+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T16:50:44+00:00</published>
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<id>urn:sha1:d647c93e9375dc47613e0a554445e4b49467f119</id>
<content type='text'>
- NV2080_CTRL_GR_CTX_BUFFER_INFO is 80 bytes (NvBool is NvU8: flags at
  56..59, uuid at 60) and the params are 5136 bytes, not 5648; the previous
  ABI mismatch is why GR_GET_CTX_BUFFER_INFO returned NV_ERR_INVALID_ARGUMENT
  (0x1f) on every shared-VAS cycle.
- Under gsp_phys_srv_ctxbuf the GSP-RM server allocates/maps/commits the
  engine context itself: do not install the client GR context-window PDEs and
  do not map the client ctx VA in the PDB, so a client mapping cannot clobber
  the server's own context-window page table.
- Dump the server-written INSTANCE/RAMFC chunks after BIND/SCHEDULE on the
  shared GR path so the committed engine-context pointer/VA can be located.
- Emit the full NOCAT diag buffer as 16-byte hex rows (the printable copy is
  capped at 192 dotted bytes and hides binary fault dumps).
Untested on hardware at commit time; the next supervised GR cycle validates.
</content>
</entry>
<entry>
<title>vgsp: GR shared path ctx-window PDE install and PATCH+MAIN PA-only promote fallback</title>
<updated>2026-10-05T16:15:30+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T16:15:30+00:00</published>
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<id>urn:sha1:f90b1a123a60dea44ac98f05529ec2fd545c26eb</id>
<content type='text'>
- UPDATE_PDE_2 now also installs the GR context window PT pages (PDE 17+).
- The shared-path fallback promotes PATCH then MAIN PA-only (mode-13 order,
  the real client's set); the mapped (bNonmapped=0) entry still hits the
  known 0x40 structural gate and is not sent.
- Shared+srvctx: channel/BIND/schedule/token/GPFIFO fetch all green; the
  remaining failure is ROBUST_CHANNEL_GR_FAULT_DURING_CTXSW (0x2c).
</content>
</entry>
<entry>
<title>vgsp: GR ladder shared-VAS page-table install and server-managed ctx commit path</title>
<updated>2026-10-05T16:12:47+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-05T16:12:47+00:00</published>
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<id>urn:sha1:a9fd600193b2cb4d4393a2600f8ff9fc973fecdf</id>
<content type='text'>
- DMA_UPDATE_PDE_2 client control installs the ladder leaf PT through the
  server's own MMU walker on the shared-management VAS (the raw-PDB entries
  are not preserved by the root migration); FLUSH_PDE_CACHE + post-install
  refill + PT diagnostics.
- srvctx registry profile also disables split VAS management; MAP_MEMORY_DMA
  is not served by GSP-RM for this client (NV_ERR_INVALID_FUNCTION), so the
  PDE control replaces it.
- shared-path context commit helper: GPU_INITIALIZE_CTX + PA-only
  GPU_PROMOTE_CTX for the server-reported (or client fallback) MAIN buffer;
  GR_GET_CTX_BUFFER_INFO sends bufferCount=64.
- Result: shared VAS + srvctx no longer wedges; channel/BIND/schedule/token
  green, PBDMA fetches the GPFIFO (GPGet=1); remaining wall is
  ROBUST_CHANNEL_GR_FAULT_DURING_CTXSW (0x2c).
</content>
</entry>
<entry>
<title>vgsp: host CUDA bridge + sema release recovery; greeneye simulator wave</title>
<updated>2026-10-03T18:05:38+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-03T18:05:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=cc79b478843f0230fe6aa8ecd822de7ba71c891e'/>
<id>urn:sha1:cc79b478843f0230fe6aa8ecd822de7ba71c891e</id>
<content type='text'>
- kernel: gsp_cuda_bridge (QMD launch capture, debugfs job/out/done, param+output resolution cached from inline writes), sema drain fixes (never hold/starve a channel), GR ring autopin + counter autoreg, per-page push reads, counter-derive gate; module builds clean
- tools/cuda-bridge: CUDA driver-API daemon executing mail/vadd kernels on the physical GPU, CUBB2/CBD2 v2 protocol, layout check + self-tests
- tools/guest-diag + tools/cuda-ab: scanner/pin fixes, victory push-only mode
- debug/risc-v-gsp-rm-vm: Phase S simulator wave (GSP device model, boot ladder, triage/re-demo harnesses, docs 30-41), GPGPU-sim scaffolding
- STATE-CURRENT/docs updates
</content>
</entry>
<entry>
<title>kernel: capture the guest's PROMOTE_CTX entries; add promote mode 19 (guest-faithful 9-entry set)</title>
<updated>2026-10-02T19:45:55+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:45:55+00:00</published>
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<id>urn:sha1:680c0ad248dd54f5778808f19fbb6c2f9835ebab</id>
<content type='text'>
- gsp_rm_emulation: dump every guest GPU_PROMOTE_CTX (0x2080012b) params and
  entries so the real client's promote shape is observable (captured on the
  emulation path: MAIN 2 MB PA+VA, PATCH, BUNDLE_CB/PAGEPOOL/ATTRIBUTE_CB/
  RTV_CB_GLOBAL VA-only, FECS, PRIV, UNRESTRICTED)
- gsp_phys_booter: promote mode 19 replays that exact 9-entry shape on the V5
  channel with host buffers (MAIN 2 MB + PDB map, small buffers, booking-only
  VAs); clamp 0..19
- docs/eng-ops: mode-19 result recorded - the server never replied (fn76 -110)
  and the release fail-safe held WPR2/GPU until an approved reboot; mode 19 is
  known-wedging
</content>
</entry>
<entry>
<title>kernel: GR promote mode 18 (client FERMI_CONTEXT_SHARE_A via hContextShare)</title>
<updated>2026-10-02T19:17:34+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:17:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=1978df065e52e3068b188554c13fd32434e6cd70'/>
<id>urn:sha1:1978df065e52e3068b188554c13fd32434e6cd70</id>
<content type='text'>
- gsp_phys_booter: mode 18 allocates a FERMI_CONTEXT_SHARE_A (0x9067) on the
  TSG with the ladder VAS and carries it as hContextShare on the V6 KMD
  channel, so the share construct can allocate the GraphicsSubcontext the
  single-MAIN promote needs; clamp 0..18
- docs/eng-ops: GR promote bisection row updated with the session-2 results
  (modes 12-18: PA-only accepted but no ENG_CTX_VALID; PATCH/PM/FBMEM and
  server-managed registry all leave the KMD promote at 0x40; wall is the
  commit/RAMFC path)
</content>
</entry>
<entry>
<title>kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh</title>
<updated>2026-10-02T19:13:06+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T19:13:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d'/>
<id>urn:sha1:c9bf1cf098c8ea4daeb3e6c9b274a9025c03045d</id>
<content type='text'>
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
  batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
  old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
  PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
  geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
  parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
  /sys/kernel/debug/vgsp/, vgsp-&lt;subsystem&gt;: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
  tool updates; README/SBOM/install/Makefile sync

Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
</content>
</entry>
<entry>
<title>gsp-phys: GR engine context allocate/map/promote before the GR sem push (default off; live-unverified at promote)</title>
<updated>2026-10-02T14:58:17+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T14:58:17+00:00</published>
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<id>urn:sha1:2f249817df327f5dcccf0464ad517fa60d6071d3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>gsp-phys: relay verify hardening and counter exposure (default off)</title>
<updated>2026-10-02T12:41:17+00:00</updated>
<author>
<name>Arthur Hanson Rasmusson</name>
<email>arthur@vgpu.io</email>
</author>
<published>2026-10-02T12:41:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.vgpu.io/open-iov.git/commit/?id=ae441e307665e748d3d5bd9ec028b3262b216a95'/>
<id>urn:sha1:ae441e307665e748d3d5bd9ec028b3262b216a95</id>
<content type='text'>
- the work_relay state line now reports the real backend data-compare
  verify_fail plus a verify_transient count, distinct from the sema-service
  hold re-read verify_fail (previously the backend counter was dropped)
- a relayed copy whose host-side compare fails is re-read and re-compared
  once after a short delay; a transient mismatch counts as success and only
  a persistent mismatch falls back to the software apply as before
- the final-mismatch diagnostic now logs the semaphore target/payload/poll
  time, the first differing byte and 16-byte dumps of live dst, live src and
  a submit-time analysis material, flagging source mutation vs snapshot/dst
- the fault no_event path logs the post reason/return
All changes are behind the default-off relay path.
</content>
</entry>
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